Adeneo provides the official Windows CE board support package for Atmel’s ARM920T based chip, the AT91RM9200.
Adeneo provides the official Windows CE board support package for Atmel’s ARM920T based chip, the AT91RM9200. This package supports all Atmel development boards, and is fully compliant with Windows CE 5.0 and 4.2. Integrating drivers for all standard interfaces, this board support package enables application developers to port their Windows CE-based software onto systems based on the AT91RM9200 with minimal development effort and risk.

Additionally, Adeneo can adapt or enhance the BSP to the specific requirements of the client.

As a Windows CE-certified training partner, Adeneo also provides training courses based on Microsoft official courses.

A demo version in binary form of this Windows CE BSP is included with all AT91RM9200-DK or AT91RM9200-EK kits.

Source code can be purchased from Adeneo.

‘Adeneo’s status as a gold level partner of Microsoft on Windows Embedded is for our customers the best warranty of reliable and competitive Windows CE solutions’.

‘Thanks to our fusion with Adetel (200 hardware and software engineers) we can confirm our real expertise for complete solutions including both hardware and software design’, said Olivier Pequet, Adeneo’s General Director.

Among customers who already used this BSP, Alain Soubirane, Sagem’s Product Manager of Practel (rugged PDA for maintenance) said: ‘We had a real time to market concern on our product, with a need to upgrade performance of our system to reach new business targets’.

‘Adeneo’s AT91RM9200 BSP combined with their expertise in hardware design and their ability to customise their product in a short time to fit with our specific product requirements gave us the ability to have our new Practelium up and running in only a few weeks’.

Thomas Ruf, Sales Manager of Emtrion (which uses the BSP for the development of their HiCO.ARM9 modular board) commented: ‘Time to market and highest product quality are the main requirements to be successful in the embedded market’.

‘Emtrion’s developers are very impressed about the richness and reliability of Adeset Windows CE 5.0 BSP’.

The Kaleido integrated development environment helps handset vendors to create and implement sophisticated man machine interfaces.
Mobile software specialist Digital Airways announces the availability of the Kaleido integrated development environment (KIDE), a fully integrated development solution enabling handset vendors to create and implement sophisticated man machine interfaces (MMI) with increased productivity and shorter time to market. In a market characterised by rapid fragmentation and evolution, handset vendors need to create an increasing number of specific MMI. This translates into an engineering challenge since traditional development approaches - designed for an era where change was slow and the same handset could be sold to all operators - are reaching their limits.

As a result, the industry is facing a bottleneck, threatening vendors’ profitability, with a sluggish handset design process compounded by raising costs and quality issues.

Two years ago, Digital Airways introduced Kaleido to address this issue.

By separating the MMI specification from its implementation, the MMI is fully specified with a configurable file, which is read and duly rendered by the MMI engine implemented on the handset.

Thanks to Kaleido, innovative handsets have already been designed and introduced in record time.

KIDE extends Kaleido by integrating its existing tools within one single, fully customisable environment based on Eclipse, the widely used open source development environment, and by adding new, productivity-improving tools.

A visual MMI authoring tool allows designers to create and modify a MMI in a user-friendly environment.

An MMI PC simulator allows designers to visualise and test the MMI in real time during the design phase.

An MMI generator automatically produces a flashable MMI file from the authoring tool adapted to a specific target.

The parameters of a hardware and software targets are defined by creating target profiles.

Profiles are already available for a number of hardware and software platforms, and new profiles are added regularly.

An MMI engine integrated on the target handset implements the MMI created by the MMI generator.

Largely OS-independent, the MMI engine allows the creation of generic handsets that can be easily customised.

KIDE also incorporates a number of other powerful tools, such as a high-level debugger, interactive documentation and wizards.

According to Philippe Silberzahn, CEO of Digital Airways: ‘By integrating the complete tool chain from the creation of the MMI design up to the automatic production of a flashable MMI file within a single environment, KIDE dramatically increases the productivity of mobile handset MMI development’.

From ultra-low-cost handsets to 3G and 4G models, KIDE allows vendors to design new handsets with sophisticated MMIs using high-end software components.

Adds Silberzahn: ‘KIDE allows vendors to easily manage the MMI designs for all their platforms, reducing integration costs and accelerating time to market’.

KIDE is available immediately.

Software automates standard cell design optimisation for timing, area and leakage power, accelerating design closure for high-speed standard cell designs.
Zenasis Technologies has expanded its series of ZenTime products: ZenTime-GT, ZenTime-AT and ZenTime-PT automate standard cell design optimisation for timing, area and leakage power, respectively, accelerating design closure for high-speed standard cell designs. Timing closure continues to be a challenge with high performance standard cell designs; leakage power is increasing exponentially in nanometre designs and can no longer be ignored. IP core integration and migration further complicate the process.

The limitations of traditional approaches result in multiple, lengthy design iterations and a substantial amount of manual intervention.

By using patented ‘hybrid optimisation’ technology to analyse and optimise standard cell designs at the logical, physical, and transistor levels, Zenasis’ ZenTime optimisation products achieve many of the benefits of custom design in a manner transparent to the designer.

‘There are counterbalancing forces that must be managed with high-speed nanometre designs’, said Dennis Harmon, Zenasis’ CEO and President.

‘Our ZenTime products automatically resolve designers’ conflicting optimisation goals within project deadlines, and allow them to push their quality of results to the design limit while reducing product costs’.

The new ZenTime products bring significant new capabilities to designers employing standard cell libraries as part of their design methodology.

With ZenTime-GT, designers can achieve performance improvements without changing their existing process technologies to smaller, lower yield geometries.

ZenTime-GT employs multiple timing optimisation techniques including: buffer insertion, such as buffer tree construction and restructuring; gate sizing for discrete drive strengths; pin permutation; use of inverted logic gates; and output stage sizing.

ZenTime-GT is tightly integrated with placement and static timing analysis engines and can be plugged directly into existing standard cell design flows.

ZenTime-AT works in conjunction with ZenTime-GT to manage the area tradeoffs that can be associated with meeting timing constraints.

Following timing optimisation with ZenTime-GT, ZenTime-AT recovers area impacted by timing optimisation as well as from positive slack points.

This area optimisation steps allow designers to control their product cost.

ZenTime-PT works in conjunction with ZenTime-GT to improve the leakage power trade-offs that can be associated with meeting timing constraints.

Following timing optimisation with ZenTime-GT, ZenTime-PT reduces the leakage power on the noncritical paths.

The power optimisation step enables efficient use of low-Vt cells in a multi-Vt design, resulting in longer battery life.

ZenTime-GT.

ZenTime-AT and ZenTime-PT are tightly integrated into existing standard-cell design flows; they are typically used following the logic and physical synthesis stage.

The input to ZenTime products is a Verilog netlist, DEF and SDC files, and library information such as GDSII, LIB, LEF, Verilog and Spice netlists.

ZenTime products output an optimised Verilog netlist and DEF, plus GDSII, LIB, LEF, Verilog and Spice netlists for the cells created on-the-fly.

The ZenTime family of products now includes ZenTime-GT, ZenTime-AT, ZenTime-PT and ZenTime-XT (formerly ZenTime).

ZenTime-XT focuses on optimisation at the transistor level, works iteratively with gate level technology to find and fix timing bottlenecks, and interfaces to existing standard cell library view creation flows.

ZenTime-GT, ZenTime-AT, ZenTime-PT and ZenTime-XT production versions are available immediately with flexible package pricing.

ZenTime’s product family runs on Linux and Sun-Solaris platforms.

CoWare’s new Virtual Platform product family will enable the company to expand into the software development market.
CoWare’s new Virtual Platform product family will enable the company to expand into the software development market. CoWare Virtual Platform product family supports the creation, distribution, and use of virtual hardware platforms for software development. It delivers new development tools and methodologies that enable the creation of virtual hardware platforms for software development and validation.

It also enables electronics companies to engage more effectively with their customers and ecosystem partners.

The solution is integrated with and supports the CoWare platform-driven ESL strategy.

Virtual hardware platforms are models of the device hardware and the environment it evolves in, and are suitable for the development and validation of an entire device software stack up to the application level.

Their key characteristics are fast execution speed, scalability, early availability, unprecedented hardware controllability, observability, determinism and easy distribution.

Traditional software development and validation solutions have either been nonrepresentative of the device hardware, too slow, available too late, or have not provided enough hardware controllability and observability.

By using virtual hardware platforms, software developers and development teams can reap the benefits of an earlier start to device software development and validation, improved productivity, and lower development costs.

Also, virtual hardware platforms will facilitate supply chain interaction because they can be distributed to customers and ecosystem partners.

This results in earlier product feedback and software development for faster time to market and increased return on investment.

‘CoWare Virtual Platform provides an innovative solution for validating embedded device software before the target hardware is available’, said Matt Volckmann, Senior embedded software Analyst at Venture Development Corporation.

‘This new solution puts CoWare into a position to directly support the device software development process and deliver value to semiconductor companies and device manufacturers’.

The CoWare Virtual Platform product family comprises two packages.

CoWare Virtual Platform Designer is the first virtual hardware platform creation environment based on SystemC includes a graphical modelling and high performance SystemC environment, an Eclipse-based SystemC IDE, and an automated virtual platform software package generation.

CoWare Virtual Platform is the self-contained, distributable virtual platform software package generated by the CoWare Virtual Plaform Designer, includes the executable virtual platform model, the software tools to leverage the unique capability of the virtual platform, and the scripting and application programming interface to integrate the virtual platform in the software development and validation environment.

‘Our technologies, tools, and expertise in hardware/software codesign have enabled us to provide an optimised and integrated platform-driven ESL design solution for the software development and validation teams’, said Marc Serughetti, Director of Marketing, CoWare.

‘Our new solution provides the infrastructure required so that electronic companies can focus on their core expertise in order to design and deliver differentiated products to their target markets in a more reliable and efficient manner’.

CoWare has made a major strategic move into the embedded and application software development market for electronic devices.
CoWare has made a major strategic move into the embedded and application software development market for electronic devices. Platform-driven ESL design is used in the development of electronic devices in markets such as consumer, mobile and wireless, networking, and automotive. With more than one half million software developers focused on embedded and application software for devices (according to Gartner/Dataquest Group), this expansion represents a significant opportunity for CoWare to grow and deliver new solutions to electronics companies.

CoWare has also launched its new solution for the device software development market.

The CoWare Virtual Platform product family supports the creation, distribution, and use of virtual hardware platforms for the development of complete device software stacks.

It offers new technologies and methodologies to deliver device software more efficiently.

‘Entering this market with new solutions that address real customer development challenges is a major element of CoWare’s strategy for continued growth’, said Alan Naumann, CoWare President and CEO.

‘After investing 18 months in customer-collaborative R and D, we’re now delivering the market’s first standards-based, platform-driven ESL solution for software development’.

‘CoWare serves all 20 of the world’s top 20 semiconductor companies and 16 of the top 20 systems companies worldwide, and we’re excited to provide them with new solutions for gaining competitive advantage’.

Multimedia convergence, especially in the consumer electronics markets, drives the need for increasingly complex product architectures.

At the same time, the software content of such devices has been growing exponentially.

Electronics companies are being forced to change their product development strategies to successfully address the increasing market demands.

Their focus has shifted from individual products to product platforms that define the basic architecture of a product and can be used to derive multiple products over a period of time.

The design of product platforms places a new set of requirements on the design tools and methodologies.

The traditional electronic design automation (EDA) design flow is no longer sufficient.

The platform architecture must be captured at a higher level of abstraction so that all the elements of that platform can be modelled in a manner that allows the execution of real software applications on the platform model.

In addition, the development must take into account the enablement of suppliers, partners, and customers.

This is precisely what CoWare is providing to customers and the customers are responding with enthusiasm.

‘As companies continue to develop embedded devices with increasingly sophisticated chip architectures and more complex software applications, the importance of comprehensively testing systems earlier in the design process is critical to reducing project risk’, said Matt Volckmann, Senior embedded software Analyst at Venture Development Corporation.

‘CoWare’s platform-driven ESL approach and latest expansion into the software development market will allow the company to offer additional value to both semiconductor companies and device manufacturers’.

Freescale Semiconductor and Wind River Systems have announced a strategic alliance aimed at helping customers enhance system performance, reduce cost and accelerate time to market.
Freescale Semiconductor and Wind River Systems have announced a strategic alliance aimed at helping customers enhance system performance, reduce cost and accelerate time to market. The alliance unites the breadth and depth of each company’s products and technologies to enable optimised solutions designed to offer an easy, productive ‘out-of-the-box’ experience for embedded system and device software developers. ‘The ultimate goal of this alliance is simple: offer our mutual customers easier-to-use, better integrated and higher performance solutions than competitive stand-alone offerings’, said David Perkins, Senior Vice President and General Manager of Freescale’s Networking and Computing Systems Group.

‘Freescale and Wind River have a long and fruitful history of collaboration’.

‘This alliance deepens our partnership to enable a comprehensive set of highly integrated, performance-optimised solutions for home, enterprise, and networking and communications infrastructure markets’.

A cornerstone of the alliance is to provide extensive support for Freescale’s PowerQUICC communications processors and host processors containing PowerPC cores.

This support will be delivered across Wind River’s broad portfolio of device software optimisation (DSO) solutions, including its VxWorks real-time operating system (RTOS) platforms, carrier-grade Linux platforms and eclipse-based development suite.

Customers can leverage Wind River’s industry-leading DSO solutions throughout the full range of Freescale’s communications processors, enabling a common, scalable development environment for applications of any size or complexity.

The alliance is designed to combine Wind River’s run-time software platforms and Freescale’s hardware acceleration architectures, including integrated security engines, to provide performance-optimised solutions for customers in the communications and networking markets.

Target applications for the joint solutions include wireline and wireless communications infrastructure, enterprise switching and routing, SOHO and home networking and high-end industrial control.

‘As undisputed market leaders, Wind River and Freescale can jointly leverage the scale and breadth of our products, capabilities and market presence to deliver easy-to-use solutions our customers require’, said Ken Klein, Chairman, President and Chief Executive Office at Wind River.

‘Customers increasingly demand whole-product solutions that tightly integrate silicon, operating systems, tools, boards and applications and are easy to use and deploy’.

‘This alliance will expedite the delivery of these integrated solutions and enhance our customers’ time to market’.

To underscore the momentum of their alliance, Freescale and Wind River joined forces at the 2006 Worldwide User Conference on a demonstration milestone.

The two companies are showcasing the first public demonstration of Freescale’s dual-core MPC8641D processor running the VxWorks RTOS on both cores in concert with Wind River’s innovative multicore debugger capabilities.

The MPC8641D contains two high-performance e600 PowerPC cores unified in a system-on-chip architecture that combines high-speed interconnects, such as Serial RapidIO interconnect technology, gigabit Ethernet and PCI Express.

Kozio has become a new corporate member of the Freescale Semiconductor Design Alliance Programme.
Kozio has become a new corporate member of the Freescale semiconductor design Alliance Programme. Kozio provides a comprehensive test package for custom hardware platforms with fast delivery times for supported processors, including Freescale’s PowerQUICC II, PowerQUICC II Pro, and PowerQUICC III architectures, featuring the MPC82XX, MPC83XX and MPC85XX processors. ‘We’re thrilled to be a part of the Freescale Design Alliance Programme’, said Joseph Skazinski, President of Kozio.

‘It builds on our previous involvement in the Freescale Tools Alliance Programme, and our commitment to support new and existing processor technology from Freescale’.

The Design Alliance Programme is a worldwide network of qualified developers working with embedded solutions.

Kozio’s involvement with the new programme will enable Freescale to better serve its customers.

The Freescale Design Alliance programme is designed to create a dynamic community of design engineers and consultants to provide Freescale customers with resources to accelerate the time to market of their products.

Hitachi Communication Technologies has improved synthesis turnaround time by 50 to 70% with Cadence Encounter RTL Compiler global synthesis.
Hitachi Communication Technologies has improved synthesis turnaround time by 50 to 70% with Cadence Encounter RTL compiler global synthesis. Encounter RTL Compiler, a key technology of the Encounter digital IC design platform, helped Hitachi Communication Technologies to achieve faster time to market on six 130nm ASIC designs. Hitachi Communication Technologies is a leader in the design, development and worldwide sales of information and communication system-related products, featuring optical access, broadband mobile and IP networks.

The six ASICs that the company taped out with Encounter RTL Compiler synthesis were a combination of wireline and wireless communications chips.

A long-time user of Cadence technology, Hitachi Communication Technologies initially adopted Encounter RTL Compiler synthesis because of its ability to reduce chip area.

This latest achievement stands to expand the company’s commitment to Cadence Encounter synthesis even further.

‘We adopted Encounter RTL Compiler synthesis because it helped us to reduce area by an average of 25%’.

‘The faster synthesis turnaround time that Encounter RTL Compiler delivered enabled us to spend more time focusing on verifying last-minute modifications of the design specification’, said Hideya Sato, CAD Department Manager in the Carrier Network Systems Division at Hitachi Communication Technologies.

‘Cadence Encounter RTL Compiler synthesis has proven to be a complete synthesis solution that delivers us benefits over our existing solution, and we are considering adopting it as the standard synthesis tool throughout the company’.

Encounter RTL Compiler global synthesis has proven through tapeouts to deliver improved performance, smaller die sizes, lower power consumption, and faster design closure through place and route.

Cadence defines the combination of these metrics as quality of silicon (QoS).

Encounter RTL Compiler is available in L, XL and GXL configurations in conjunction with Cadence’s segmentation strategy.

‘We are excited that our global synthesis technology helped improve time to quality for Hitachi Communication Technologies on these six tapeouts’, said Dr Chi-Ping Hsu, Corporate Vice President at Cadence.

‘Encounter RTL Compiler synthesis is a production-proven tool that delivers real business benefits’.

New from Datalight, the 4GR Flash file system is available for Linux 2.6 and Microsoft Windows Mobile 5.0, two of the most popular operating systems for the mobile handset market.
New from Datalight, the 4GR Flash file system is available for Linux 2.6 and Microsoft Windows Mobile 5.0, two of the most popular operating systems for the mobile handset market. 4GR is a reliable Flash file system evolved from the company’s pioneering transactional file system and patented Flash management products, Reliance and Flash FX Pro. 4GR will be available at the end of this month from Logic Technology.

Datalight 4GR guarantees data reliability, fast integration, and device design flexibility.

In the event of an unexpected power failure, a 4GR device boots quickly, recovering all data, with program code that allows the device to function and all user stored data restored.

In addition to support for Linux and Windows Mobile, customers can port 4GR to any real-time operating system using Datalight’s (RTOS) porting kit, which uses a set of file system function calls based on the familiar IEEE Posix standard.

‘Helping our customers and partners decrease their time to market is critical for us’.

‘4GR has prewritten drivers for hundreds of innovative Flash technologies, including new hybrid Flash and NAND controllers’.

‘The time that we have spent developing these drivers offers a tremendous resource savings, giving OEMs the time to innovate the next-generation of mobile devices’, stated Cortney Jacobsen, Product Manager for Datalight.

Today’s sophisticated handsets are becoming the primary communications device for many consumers and business users, and they store valuable information such as family photos, contact information and important e-mails.

With increasing competitive pressure on mobile device manufacturers, the 4GR Flash file system, in combination with Datalight’s best-in-class technical support service, provides them confidence in device reliability.

HiTech PCB Express Service has purchased Direct Logix Control Center XP automated PCB engineering/planning software for bare PCB manufacturing.
HiTech PCB Express Service has purchased Direct Logix Control Center XP automated PCB engineering/planning software for bare PCB manufacturing. Savo Stankovic, General Manager, of HiTech, commented: ‘We have a clear vision and proven track record of fast execution in the marketplace’. ‘After reviewing all available software technologies in the market place for maximum automation in our engineering and CAM group we purchased Control Center’.

‘Our decision was in part based on a software system technology that needed to be implemented in several days not months and provide functionality beyond all other available software products’.

‘These requirements led us to choose Control Center, which provides us with an automatic, integrated scalable enterprise class solution’.

‘We are proud to have been selected by HiTech for their PCB fabrication planning needs’.

‘We look forward to our European sales growing over 300% in the next 12 months, said Leigh Eichel, Vice President of Direct Logix’.

‘Control Center XP’s open CAM automation, procedure management, stackup and automatic traveler automation integrated into a central factory data centre give our customers an infrastructure that creates a real competitive advantage building a complete hardware neutral, automated, engineering solution’.

‘No one else offers this today’.

Control Center XP, developed by Direct Logix, is an automated rules-driven PCB fabrication planning system that drastically reduces internal costs, pre production engineering time and increases sales revenue for PCB fabricators.

Control Center XP Planning is based on electronic customer and manufacturing specifications.

Its rules engine dynamically generates the BOM (bill of materials), Part Traveler and CAM instructions - all revision controlled.

Control Center helps to automate time-consuming and error-prone tasks by creating a central knowledge base in each factory.

The 100% web based technology allows for the fastest factory wide deployment.

And the graphical rules programming API allows easy administration and the fastest setup time.