Jitter attenuator is optimised for the Xilinx Virtex-4 family of field programmable gate arrays.

Integrated Device Technology has developed a jitter attenuator (ICS874003-02) optimised for the Xilinx Virtex-4 family of field programmable gate arrays (FPGAs). Designed to support PCI Express (PCIe), this component is the industry’s first timing device capable of attenuating or ‘cleaning’ the jitter from a 100MHz PCIe input clock, while translating it to a 250MHz LVDS output. Removing the jitter from the signal enables original equipment manufacturers using the Virtex-4 RocketIO transceivers to achieve 2.5Gbit/s throughput - a critical specification for PCIe communications applications.

The ICS874003-02 is based on the industry-leading IDT FemtoClock technology, designed to cost-effectively generate reference clocks with extremely low, sub1ps RMS phase noise to meet the stringent jitter requirements of PCIe-based communication applications.

The IDT PCI Express jitter attenuator is available in a RoHS-compliant 20-pin TSSOP package.