Samsung Electronics has unveiled a digital living network at the Consumer Electronics Show using powerline communications technology.
Designed in partnership with Design of Systems on Silicon (DS2), Samsung Electronics has unveiled a digital living network at the Consumer Electronics Show using powerline communications (PLC) technology. The demo showcases the ease of sharing and growing digital media content and services using wiring already in the home. Samsung is providing the demonstration at the Consumer Electronics Show Central Hall, Booth 11033.

The demo features consumer electronic devices sharing digital content through a PLC AV (audio-visual) home network, several appliances with embedded DS2’s latest generation technology enable networking speeds up to 200Mbit/s as soon as they are plugged into the wall power outlets.

The theme of the demo is ‘Just plug power and enjoy digital living network’, and this demonstration will clearly show how consumers can easily watch video streams, or record live programs to a personal computer using powerlines already installed in any home.

Samsung’s home network digital media devices with DS2’s chipsets, with high throughput and guaranteed QoS, will satisfy the needs of those seeking easier AV home networking.

Moreover, the demo exhibits how DS2 technology is satisfying the stringent consumer demands for high-speed access with its 200Mbit/s throughput and quality of service.

‘DS2 is excited to work with Samsung to deliver on the promise of the digital living home network’, said Jorge Blasco, President and CEO, DS2.

‘As more and more homes seek to network their devices, it will become critical to implement the technology that provides the fastest and highest quality solution’.

‘DS2 is on the forefront of PLC and our solutions will make in-home networking easier than ever’.

‘The digital living network demonstration shows the maturity of DS2s 200Mbit/s product’.

‘It adheres to standards such as universal plug and play demanded by the consumer electronics market’, said J Subramanian, Frost and Sullivan Research Analyst.

For the products being demonstrated at CES, DS2 and Samsung worked together to embed DS2’s chipset technology into AV home devices including high-definition televisions, DVD players/recorders with built-in hard disk drives, cameras, and digital media server PCs.

These devices were connected via PLC to a Wi-Fi network allowing connection to a wireless notebook and printer to demonstrate the ease of interoperability and networking with just the electrical outlets in the home.

New single- and dual-port dual-protocol transceivers feature the industry’s highest ESD withstand rating and are ideal for space-constrained high reliability applications.
Intersil has introduced a family of single- and dual-port dual-protocol transceivers. Featuring the industry’s highest ESD withstand rating and best price/performance ratio in a tiny, space saving QFN package, the products are ideal solutions for space-constrained high reliability applications. The devices offer a full complement of features, configurations and capabilities for applications that require flexible serial interface configuration combined with high levels of ESD protection.

The family includes two dual port ICs, the ISL81334 and ISL41334 and the ISL81387 and ISL41387 single port devices.

Each transceiver features 15kV (HBM) ESD protection in compact packages that provide designers with high flexibility for connecting either RS232 or RS485/RS422 devices.

All four versions operate on 5V supplies, provide datarates of 20Mbit/s, feature flow-through pinouts to simplify board layouts, and include 2.7V differential output voltage to provide optimal noise immunity in RS485/422 networks.

Applications include single board computers, factory automation systems, security networks, industrial and process control networks, point-of-sale equipment, gaming such as slot machines and level translators.

The ISL41334 and ISL41387 provide additional functionality, including lower speed and edge rate options for EMI-sensitive designs, or to allow longer bus lengths.

These devices also features a logic supply voltage pin (VL) that sets the VOH level of logic outputs and the switching points of logic inputs, to be compatible with another supply voltage in mixed voltage systems.

When any port on each of the devices is in RS232 mode, an onboard charge pump generates compliant +/-5V output levels.

Each transceiver is RS232 compliant with the Rx outputs handling up to +/-25V and the Tx output handling +/-8V.

In RS485 mode, each transceiver supports both the RS485 and RS422 differential communication standards.

The RS485 receiver features full failsafe operation so output remains high even if inputs are open or shorted.

The RS485 transmitter supports as many as three datarates; two are slew-rate limited.

The charge pumps are disabled when both ports on the dual port ICs are in RS485 mode, to save power, minimise noise and eliminate pump capacitors.

The ISL41334 and ISL41387 are available in 40-pin QFN packages, an innovative Intersil option that offers significant board area savings for space-constrained applications such as point-of-sale terminals.

The ISL81334 and ISL81387 are available in 20-lead SSOP or SOIC packages.

Other key features for the devices are a 20Mbit/s datarate in RS485 mode, fast RS232 datarate up to 650Kbit/s, loopback mode to facilitate board self-test, low current shutdown mode, and flow-through pinouts to simplify layouts.

The CMX868A is a newly revised multistandard modem IC targeted at telemetry and telephone based information applications.
A member of CML’s wireline modem family, the CMX868A is a newly revised multistandard modem IC targeted at telemetry and telephone based information applications. Operations such as remote utility-meter reading, set-top boxes, electronic cash terminals and advanced payphones are but a few of the CMX868A’s target applications. Compliant with ITU and Bell recommendations, the CMX868A is fully backward compatible with the well-known CMX868, allowing existing users to re-use their current software and hardware designs.

In addition, the CMX868A boasts an enhanced DTMF codec that, while giving greater compatibility with Global exchanges and third party DTMF encoders, also offers excellent immunity to falsing on voice; another beneficial revision that greatly increases the applications to which this advanced modem IC is suited.

Control and data transfer on the CMX868A is via a simple high-speed serial bus, compatible with standard microcontroller interfaces.

Data transfer is conveniently handled by user-selected 8bit bytes or 16bit words via on-chip, programmable Tx and Rx USARTs.

Supported formats are either transparent synchronous data or multi-format asynchronous data compatible with the ITU V.14 recommendation.

Flexible line drivers and a receiver hybrid are integrated on-chip, requiring only passive external components to operate in a two- or four-wire circuit.

The device features a ringing signal/line reversal detector that continues to function when the device is in its Powersave mode, providing an interrupt which can be used to wake-up the host controller when these signals are detected.

A hookswitch/relay drive output, software gain controls and DTMF transmit twist compensation complete the DAA controller.

The CMX868A is an ultra-low-voltage capable device, operating from a single 2.7 to 5.5V supply and is available in 24-pin TSSOP, SOIC and DIP packages.

An enhanced full-duplex speakerphone integrated circuit promises improved sound quality in telephony applications.
Acoustic Technologies, a leading developer of high quality communication solutions for telephony equipment, has introduced the enhanced ATH3100 full-duplex speakerphone integrated circuit for improved sound quality in telephony applications. Following on the success of the ATH3000 speakerphone device, the ATH3100 includes additional telephony features and enhanced performance. The ATH3100 provides full-duplex speakerphone operation with Acoustic Technologies’ unique SoundClear technology and integrated analogue functions, dramatically improving voice quality in telephony applications.

Applications such as desktop speakerphones, VoIP speakerphones, PBX phones, and SOHO phones will benefit from the unique SoundClear advantage included in the Acoustic family of voice processing products.

To facilitate design-in of this IC, Acoustic offers an evaluation kit and eXcho tuning tool for fast time to market and high quality sound.

Acoustic Technologies SoundClear products combine acoustic echo cancellation, noise cancellation, sound enhancement, and network echo cancellation with sophisticated monitoring and control techniques to enable full-duplex speech and improved voice clarity.

The full-duplex operation provides rich, clear, enhanced sound with no clipping or distortion.

SoundClear optimises speech intelligibility with full-duplex control that dynamically monitors, detects and processes incoming voice, echo, and noise signal power levels.

Key performance features of the ATH3100 device include up to 65dB of acoustic echo cancellation, 45dB of network echo cancellation, and up to 18dB of noise cancellation.

The ATH3100 integrates dual voice-band codecs and digital PCM interfaces for integration flexibility.

Sound quality is enhanced by the ATH3100 10-band graphic equalisers, spectrally matched comfort noise and AGC functionality for both the microphone and line inputs.

In order to simplify phone system design, the device also includes support for both handset and speakerphone modes, DTMF generation, ringer tone generation and caller-ID demodulation Type I and Type II.

The ATH3100 device provides optimal speech intelligibility using patented sound enhancement techniques to increase audio fullness and presence.

‘The ATH3100 is a complete integrated solution supporting full-duplex voice processing with integrated telephony features for high quality speakerphone applications’, said Bob Ackmann, CEO of Acoustic Technologies.

‘Market leaders continue to adopt SoundClear technology for their leading edge telephony products and the ATH3100 is a great addition to our portfolio of IC and software products for those companies needing a single chip solution for their speakerphone products’.

‘Key partners will be announcing new products based on the ATH3100 soon’.

The device is tunable to specific applications, casings, and user preferences via the eXcho tuning toolset.

In addition, eXcho enables faster time to market with easy diagnostics and real-time tuning capability on the PC based GUI interface.

The ATH3100 is highly configurable and includes customisable settings that can be evaluated and optimised in real-time using the eXcho tool.

The ATH3100 is available for immediate sampling in a 48-pin LQFP package and will be available in a 48-pin QFN package in late 1Q06.

All devices use green packaging and are RoHS compliant.

An evaluation kit and eXcho tuning tool are available now to provide everything customers need to evaluate the system and quickly bring their speakerphone products to market.

Acoustic Technologies also offers acoustic consulting services for helping customers optimise their speakerphone designs.

A new Universal Serial Bus 2.0 SoC features an onboard microprocessor that processes data more than three times faster than widely deployed 8051-based USB 2.0 device controllers.
Agere Systems has introduced a Universal Serial Bus (USB) 2.0 SoC with an onboard microprocessor that processes data more than three times faster than widely deployed 8051-based USB 2.0 device controllers. Called the USS2828, the chip integrates an ARM7TDMS microprocessor and processes 40MIPS. The nearest competing chip based on the 8051 microprocessor processes data at 12MIPS.

The higher processing speed means more applications can be added via software.

Such applications include adding marketable capabilities to various USB 2.0 PC-based applications such as cameras, MP3 players and scanners.

One example could be boosting the speed at which a scanner performs image processing.

Agere’s new chip integrates 10 technologies including the ARM7TDMS core.

Integrating the ARM7TDMS in the USS2828 offers more MIPS at a similar price point as 8051-based solutions.

In addition to the integrated microcontroller, other key functions of the new chip include a USB 2.0 high-speed PHY and device controller; a direct memory access controller; a memory controller; a programmable interrupt controller; read-only memory; random access memory; general purpose input-output technology; and two timers.

The USS2828 offers developers two options for interfacing the device with the end application.

There is a 16bit external memory interface and 24 programmable I/Os.

‘Consumers want cameras, MP3 players and scanners with a more muscular engine so they can economically add differentiating, revenue-generating features to their products’, said Surinder Rai, Marketing Director of the Enterprise and Networking Division of Agere Systems.

‘This chip, because of its wealth of spare horsepower and high level of integration, provides that valuable benefit to them’.

The chip supports both high-speed USB 2.0 (480Mbit/s) and full-speed (12Mbit/s) data transfers.

Available now, the chip’s pricing varies depending on volumes.

ClassSwitch single-chip full-service Layer 2 Ethernet switches are designed for network access equipment supporting packet-based applications, such as IPTV.
Zarlink Semiconductor has introduced the first two devices in its new ClassSwitch platform of single-chip, full-service Layer 2 Ethernet switches designed for network access equipment supporting packet-based applications, such as IPTV (Internet Protocol television). Zarlink’s ClassSwitch platform supports the cost-effective design of line cards or compact systems deployed in central offices, cable head-ends or customer premises equipment that must aggregate, inspect and modify multiple real-time applications delivered over Fast and Gigabit Ethernet. The devices enable IP multicast packet-forwarding service distribution, a key element in the delivery of IP video in the first mile.

The platform includes the ZL33042 with 24 Fast Ethernet and two gigabit Ethernet port configurations and the ZL33046 Ethernet switch delivering 16 Fast and two Gigabit ports.

Future devices will incorporate lower and higher data throughput and optional port count configurations.

Growing demand for real-time packet services, including television over broadband, requires network access equipment that more efficiently analyses and manages network traffic.

Pacific Crest estimates the IPTV market will grow from 3 million subscribers today to over 25 million in 2008, and 75 million in 2010.

As IP applications and web-based services dominate network traffic, access equipment must be able to efficiently identify and handle an increasing number of IP-based ‘user packet flow’ types.

For example, IPTV, VoIP, video-on-demand, and control and signalling messages are distinct flows that must be uniquely managed.

Zarlink’s ClassSwitch platform provides high intelligence for aggregation equipment, while lowering equipment design costs by integrating multiple features on a single chip.

Packets entering the devices are classified to a flow based on user-defined rules, using information such as frame source and destination address or applications using L2 (Layer 2) to L7 (Layer 7) fields of incoming packets.

Up to 1024 distinct flows can be created per device.

The architecture supports per-flow two-rate, three-colour metering and policing.

Scheduling algorithms, such as SP (strict priority) and WFQ (weighted fair queuing), manage packets and prioritise queued traffic.

Zarlink’s Ethernet switches integrate a hardware-based DOS (denial of service) attack-flow engine to protect against viruses and malicious attacks.

This attack prevention engine ensures uninterrupted services while preventing the loss of information or revenue that can result from network disruptions.

Zarlink’s Ethernet switches include up to 24 MACs (media access controllers) for 10/100Mbit/s and two GMACs (gigabit MACs) for 10/100/1000Mbit/s.

All MACs and GMACs support copper (twisted wire) or fibre physical interfaces.

In its core, the device family provides multi-field traffic classification of L2 and L7 fields, IP Multicast and Unicast bandwidth distribution, and a traffic queuing engine.

Fair management of traffic is maintained at all times through an advanced WFQ scheduling algorithm, flexible packet buffer and queue management, and a WRED (weighted random early detect) algorithm.

To simplify equipment design, the platform’s parametric programmability allows efficient and flexible system development without requiring additional programming for network processor implementations.

Programmable prioritised filtering and forwarding allows hardware-based per-flow accounting, allowing processor resources to be dedicated to more important tasks.

Zarlink’s ClassSwitch family is supported by a field-proven software platform.

The switches incorporate device driver software offering an easy-to-use API supporting advanced access control, and various protocol modules including IGMPv3 for IP video applications.

The ZL33042 and ZL33046 Ethernet switches, available now.

Evaluation boards with various plug-in modules for 100/1000 Ethernet transceivers as well as CPUs based on PowerPC, ARM and MIPS will be available soon.

The Tundra Tsi110 host bridge is billed as the industry’s highest performing host bridge for PowerPC.
The Tundra Tsi110 host bridge is billed as the industry’s highest performing host bridge for PowerPC. The latest addition to Tundra’s industry-leading family of host bridges is optimised for a broad range of applications for the wireless and wireline networking, storage and embedded computing markets. The Tsi110 host bridge sets industry benchmarks for performance and power management through an innovative feature set supported by world-class design support.

Ideal for power sensitive and cost sensitive applications, the Tsi110 integrates several communications peripherals - including two four-lane PCI-Express ports, four gigabit Ethernet ports and one PCI-X port.

This high level of integration offers system designers numerous options for I/O connectivity and reduces external component count.

Included in the Tsi110’s innovative feature set is Gigabit Ethernet hardware acceleration, which offloads the host processor and allows the four Gigabit Ethernet ports to run at full line rate for data plane applications.

The Tsi110 packaging, ball map, and I/O features were all designed with reliability and signal integrity in mind to ease the challenge of high-speed board designs.

The Tsi110 is also software compatible with the Tsi109 and Tsi108, allowing software reuse and accelerating development cycles.

The combination of the Tsi110’s features, reliability and Tundra’s world-class support provides designers with the benefits of greater overall system performance, reduced system design complexity, better integration and superior power efficiency.

‘Tundra continues to innovate in this space, and along with the industry, predicts strong growth in the scope of PowerPC’s leadership in the markets we serve’, says Rick O’Connor, Tundra’s chief technology officer.

‘Tundra is the leader in delivering system interconnect solutions for greater system performance, power and cost benefits that designers need to build high-performance, scalable designs’.

The Tsi110 claims best system performance-per-watt as well as best system performance-per-dollar, making it an ideal companion chip for both Freescale MPC74xx and IBM PPC750xx high performance processors.

The combination of the Tsi110’s rich feature set, high reliability and Tundra’s accessible design support has been well received by the industry’s leading PowerPC processing vendors such as, IBM.

‘Tundra’s new Tsi110 host bridge, when combined with our high-performance MPC7447A/7448 processors, allows customers to leverage high-performance processing performance while optimising system power’, said Glenn Beck, Market Segment Manager for Freescale Semiconductor’s Digital Systems Division.

‘With the PCI Express interface, the Tsi110 enables even more design flexibility for our embedded networking customers and opens up possibilities for greater adoption in a range of applications’.

‘Tundra’s latest addition to their host bridge family is good news for Power Architecture’.

‘The new Tsi110 host bridge aligns well with IBM’s high performance 750 PowerPC processors’, said Ron Martino, director of PPC Standard Products, IBM Systems and Technology Group.

‘When combined, these technologies offer embedded system designers superior performance and power efficiency required to build optimised systems for a range of next-generation applications’.

The Tsi110 host bridge will be available for sampling late in 2006 through Tundra’s worldwide sales network.

Volume pricing for the Tsi110 is under US $80.

The Si5040 leverages DSPLL technology to create the industry’s first 10Gbit/s XFP transceiver IC with integrated jitter attenuating capability on both transmit and receive datapaths.
Silicon Laboratories has announced the Si5040, the latest addition to the company’s family of high-speed physical layer products. The Si5040 leverages Silicon Laboratories’ proven DSPLL technology to create the industry’s first 10Gbit/s XFP transceiver IC with integrated jitter attenuating capability on both transmit and receive datapaths. With a package size of only 5 x 5mm, the Si5040 is the industry’s smallest solution offering low power and low jitter for space-constrained XFP applications.

Additionally, the Si5040 is the only transceiver to support continuous operation with jitter attenuation across all telecomms and datacomms protocols between 9.9 and 11.4Gbit/s, including OC-192/STM-64, 10GbE, 10G Fibre Channel and their corresponding forward error correction (FEC) datarates.

Achieving best-in-class jitter performance, the Si5040 uses Silicon Laboratories’ patented DSPLL technology to reduce jitter on 10Gbit/s serial data streams that have been degraded by system level noise sources on either the network side or the port card.

This revolutionary new transceiver architecture provides industry-leading transmit jitter generation of 2.5mUI RMS while eliminating the need for external jitter clean up circuitry inside the module or on the port card.

Applying DSPLL technology in the receive path minimises receive data jitter to ensure error-free operation with port card ASICs or FPGAs.

The Si5040 uses an innovative receiver circuit that automatically adjusts data recovery parameters to optimise bit-error-rate (BER) performance ensuring robust operation in unpredictable multivendor network environments over a wide range of channel conditions.

Receiver performance is optimised by using an internal signal quality monitor to drive real-time adjustment of the decision threshold so that BER performance and jitter tolerance is maximised.

The Si5040 also supports manual adjustment of the receiver decision threshold and sampling phase for custom BER optimisation algorithms.

Regardless of receiver operating mode, the superior input sensitivity (5mV peak-peak differential typical) of the Si5040 makes it idea for both short and long reach applications.

‘The Si5040 continues to deliver on Silicon Laboratories’ commitment to providing innovative solutions to the networking industry by leveraging our industry leading DSPLL technology’, said Dave Bresemann, Vice President of Silicon Laboratories.

‘By combining jitter attenuation capability together with a sophisticated receiver architecture, we are greatly simplifying the task of achieving true SONET/SDH performance in XFP module applications’.

The Si5040 XFP transceiver offers the industry’s most complete feature set including support for three types of analogue and digital signal quality monitors including analogue loss-of-signal (LOS) detection, consecutive identical digit (CID) detection and a proprietary digital measure of receive data eye opening.

The Si5040 also simplifies system level test and debug by offering line loop-back, XFI loop-back and PRBS pattern generation and checking on both transmit and receive data paths.

Complete device configuration and status monitoring is available through a serial microcontroller interface supporting commonly used protocols such as I2C.

To support the industry’s need for low power solutions, the Si5040 consumes less than 575mW typical.

The Si5040 further simplifies power management by operating over a wide power supply variation from +5 to -10% and provides additional power savings through programmable signal swings on all high-speed outputs.

By operating over the full industrial temperature range (-40 to +85C), the Si5040 accommodates demanding module thermal conditions.

The Si5040 is available in a 5 x 5mm, lead-free, RoHS-compliant, 32-pin quad flat no-lead (QFN) package.

Samples are available now with production scheduled for the second quarter of 2006.

Pricing for the Si5040 is $38.25 in quantities of 1000.

Tsinghua Bitway has selected the IDT 75K62100 network search engine to power the BitEngine 12416 core router, China’s first core router with support for IPv6.
Tsinghua Bitway has selected the IDT 75K62100 network search engine (NSE) to power the BitEngine 12416 core router, China’s first core router with support for IPv6, the next-generation Internet protocol. The IDT NSE device helps Tsinghua Bitway’s core router achieve 320Gbit/s transfer rates, enabling high performance communications for many emerging IPv6-compliant applications. Momentum is growing for a transition to IPv6 in China driven by millions of new users and devices requiring IP addresses, as well as by demand for new services and increased security that are stretching the limits of the IPv4 standard.

The BitEngine12416 is the first core router in China to support both IPv4 and IPv6.

Tsinghua Bitway’s BitEngine 12416 core router is currently in service as part of the CNGI (China Next Generation IP) network, which includes network infrastructure being implemented by China Telecom, China Mobile and CNC, as well as Cernet2, which connects Chinese universities in 20 cities.

The IDT 75K62100 NSE provided Tsinghua Bitway with a number of performance and design benefits.

By delivering a pin-compatible family from 2 to 18Mbit densities, IDT allowed Tsinghua Bitway to use one design that supports multiple NSE configurations, which helped reduce costs and time to market.

The device also supports dynamic database management, providing the ability to select specific application databases to be searched while helping to reduce power consumption by up to 70%.

In addition, the device’s x36-x576 search capabilities support both IPv4 and IPv6 forwarding and policy lookups.

IDT also provided Tsinghua Bitway with a full-featured software development kit that included initialisation, management and search-control software.

Thanks to this development kit, Tsinghua Bitway experienced lower development costs, faster time to market and improved system performance.

In addition to the 75K62100 NSE, the BitEngine12416 core router also uses an IDT FIFO and an IDT zero bus turnaround (ZBT) SRAM device.

The flexible LVTTL interface for ASIC/FPGA-based designs allowed Tsinghua Bitway to easily enable a complete router system configuration.

The Tsi108 and Tsi109 host bridges offer designers best system performance-per-watt as well as best system performance-per-dollar.
Tundra Semiconductor has announced two key development milestones for its family of host bridges, demonstrating the company’s rapidly strengthened position as the industry’s leading supplier of host bridges for PowerPC. The Tsi108 host bridge, a high performance host bridge with patent pending technology that supports PCI-X, DDR2-400 SDRAM, gigabit Ethernet and Flash memory, is now in full production. The Tsi108 processor bus operates up to 200MHz and was the first host bridge for PowerPC to support DDR2 memory.

With such integrated features as spread spectrum clock generation, the Tsi108 increases system performance, reduces system design complexity and lowers overall system cost.

The Tsi109 host bridge is now available for general sampling.

Building on the extensive benefits of the Tsi108, the Tsi109 is capable of dual processor support that enables higher system compute performance.

The Tsi109 has an improved memory pipeline that increases memory bandwidth and integrated power management features to address demanding, low power applications.

The Tsi108 and Tsi109 offer designers best system performance-per-watt as well as best system performance-per-dollar.

Tundra’s growing portfolio of host bridges for PowerPC delivers industry-leading system performance, power and cost for customers in the wireless and wireline networking, storage and embedded computing markets.

The Tsi108 and Tsi109 have received broad support from several leading customers in a range of markets, including Momentum Computer Momentum Computer, a leading provider of high-performance embedded, single board computer and compression solutions, designed Tundra’s Tsi108 and Tsi109 into their board-level computer solutions for the data/telecommunications, military and aerospace markets, meeting the critical production and quality requirements of the leading industries in these markets.

‘We are pleased to see production availability and general sampling of Tundra’s Tsi108 and Tsi109 high performance host bridges’.

‘These bridges are great additions to the PowerPC ecosystem and reflect Tundra’s ongoing leadership as the ‘design partner’ for system interconnect and small footprint solutions’, said Harry White, General Manager of Momentum Computer.

‘Our customers are demanding higher performance PowerPC solutions and the availability of Tundra’s bridges with dual processor support, integrated power management and DDR2 memory backed by world-class support is enabling them to bring highly optimised systems to market faster’.

With over a decade of investment and experience supporting PowerPC-based designs, Tundra host bridges, which also include the Tsi107 and the Tsi106, are the industry’s leading companion chips for Freescale Semiconductor’s MPC74xx and IBM’s PPC750xx families of high performance processors.

Attesting to this, and to the design leadership and interoperability of Tundra’s Tsi108 and Tsi109 host bridges, Freescale Semiconductor and IBM have both chosen to develop evaluation platforms that take advantage of the benefits of theTsi108 and Tsi109 in a range of applications.

The High Performance Computing Platform II (HPCII) MPC7448/Tsi108 solution offers users a second reference design and evaluation platform in the HPC series.

This reference solution maximises the capabilities of the Tundra host bridge family, providing customers with higher system performance and lower system power creating the best system cost solution available.

This evaluation platform is currently available through Freescale Semiconductor.

‘Tundra is a trusted partner in system interconnect solutions, and we welcome the introduction of their new host bridge to the growing ecosystem behind PowerPC architecture’, said Lynelle McKay, Vice President and General Manager of Freescale Semiconductor’s Digital Systems Division.

‘The combination of Freescale’s high-performance MPC7448 PowerPC processors and Tundra’s Tsi108 and Tsi109 host bridges enables our customers to reduce power and increase performance for their embedded system designs’.

Now available through IBM, the PPC750GX/GL/Tsi108 evaluation platform effectively demonstrates the interoperability of the Tundra host bridge family with IBM PPC750GX processors and the ease of design made possible by its features.

The evaluation platform also demonstrates the enhanced signal integrity benefits of the Tsi108 when paired with the IBM 750GX/GL through reliable 200MHz operation with only an eight-layer printed circuit board.

For low power and cost sensitive applications, this combination provides users with the best performance, power and cost configuration available on the market.

This evaluation platform is currently available through IBM.

‘IBM has added a 750GX/GL evaluationboard using the Tsi108 because the Tundra product offers not only what we need in terms of cost and power benefits, but what our customers look for as well’, said Ron Martino, Director for PowerPC Standard Products, IBM Systems and Technology.

‘Designers looking to build high performance and scalable next generation systems need a reliable host bridge provider that offers the features and support they need to succeed’, says Rick O’Connor, Tundra’s Chief Technology Officer.

‘Tundra is the system interconnect leader delivering superior design support so that customers can realise the performance, power and signal integrity benefits to optimise system performance and cost for their PowerPC-based designs’.

Both the Tundra Tsi108 and Tsi109 are available through Tundra’s worldwide sales network.

The Tsi108 is currently available in a standard package for commercial temperatures.

A lead-free version is currently sampling and is expected to be in full production shortly.

Volume pricing for the Tsi108 is less than US $70.

The Tsi109 is currently sampling in both standard and lead-free packages for commercial temperatures.