Running a lean ship in the auto industry is not new. What is new is where that leanness manifests itself. One place is in labor. Because the number of people supporting the production line itself and whatever system(s) sequencing work instructions to the operators on that line has been reduced, there tends not to be an IT support person. Instead, there is a controls person doing two jobs: control systems and IT support. Lean also shows up in production strategy. Make-to-order (MTO) is replacing building to stock and shoving inventory out to dealerships, even though the tools that make MTO possible are still evolving. A third place is in data collection, now very much legitimized by the high warranty and recall costs for products. Information can cut to the chase, enabling automakers to recall the exact vehicles that might be having problems. Then there’s the need to protect all these investments in IT and control systems with minimal fuss and expense. Here are some examples of how some controls vendors are helping the auto industry lean out in this realm.

Bosch Rexroth Corp. (Hoffman Estates, IL; www.boschrexroth-us.com) recently announced plug-and-play control that includes all the necessary hardware and software components–with predefined motion function blocks–for two types of applications: articulated robot pick-and-place and roll feed systems.

IndraMotion for Handling, based on Rexroth’s IndraControl L40 motion logic controller, is for Cartesian gantries with up to three linear axes and three rotary axes of motion. This motion is controlled by IEC 61131-based motion function blocks that require a few basic parameters for setup. Depending on what the gantry has to do, between 70% and 90% of the code is basically finished, claims Karl Rapp, automation and machine tool branch manager for Bosch Rexroth, Electric Drives and Controls. Similarly, IndraMotion for Metal Forming has the motion functions for such applications as roll feed, coilers, and traveling cutters. To set up, a user need only enter length, speed, and quantity parameters. This IndraMotion system comes in three versions with differing OEM programming options. One version requires no programming; another lets users program functions blocks to integrate IndraDrives into custom roll feed systems.

The IndraMotion code comes on a CD as “open source.” Explains Rapp, the code is finished, but modifiable. “It’s not like we compile it and then the user can’t do anything with it.” The screens are provided as compiled run-time files that can be loaded into Microsoft Windows CE devices, non-CE devices, or PCs. And both IndraMotion packages support SERCOS (fiber and Ethernet), Profibus, and DeviceNet interfaces. “The OEM doesn’t have to worry about generating the motion engine or the programming method,” continues Rapp. “There’s no syntax to learn. Users need only enter, teach, or read the point coordinates from the programmable logic controller [PLC] program or the network connection. All moves are velocity optimized and can be blended. Points can be named so they match the application by simply changing text in the PLC program–no human/machine interface [HMI] change required. The same applies to inputs and outputs, such as grippers.”

The benefits are huge. Because the programming methods of the motion itself are standardized, the OEMs only need to focus on the process and integration aspects of their handling or metalworking systems. Engineering and startup times are short. For end users, the standardized programming and troubleshooting methods across all IndraMotion-based systems saves time in installing, training, and maintaining Rexroth-based systems.

MANAGING THE EXECUTION OF CONTROL

Proficy Assembly from GE Fanuc Automation, Inc. (Albany, NY; www.gefanuc.com/en/Industries/Automotive/index.html) for Tier 0.5/1 automotive suppliers is basically a manufacturing execution system (MES) with lean manufacturing components and other built-in capabilities. For instance, in-line sequencing, which responds to OEM broadcasts, releases orders into production and to subassembly feeder lines. Option build data is generated at individual assembly stations. Error proofing capabilities include displaying process steps to the operator; activating pick-to-light; torque control devices, materials handling equipment, and other devices for the operator; and, through appropriate manual, semi-automatic, and automatic feedback, confirming the operator’s following of those process steps. Product reporting provides canned reports by line, station, step, and takt time, as well as sending relevant alerts about production. Proficy Assembly will also generate product birth certificates that include the details of each order, its bill of materials (BOM), component serial numbers, process steps and key parameters about production, quality inspections, and any alerts during production.

Here’s the kicker, explains Rich Breuning, director of discrete market development for GE Fanuc. OEMs and Tier 1 manufacturer might typically spend millions of dollars for an MES–homegrown or third-party purchase. Instead, turnkey installation of Proficy Assembly is $250,000 per production line (figure 40 to 50 stations). Deployment is expected to take less than six weeks. Typically, such production lines have a PLC for conveyor control with some rudimentary interfaces to pick-to-light bins and some error-proofing equipment, continues Breuning. The PLC remains, but it gets its “marching” orders from Proficy Assembly running on a Dell server. In the very near future, adds Jack Faett, GE Fanuc’s director of discrete OEM solutions, the MES will run inside a GE PACSystem server, a controller with a single board computer (SBC). (Points out Faett, there are SBCs just as powerful, if not more powerful, than desktop servers.) The SBC can be put inside an industrialized PC or be part of a VME rack system.

CablEquity 2006 automates the design and documentation of hardware electrical systems.
CablEquity 2006 from TurboTools Corp automates the design and documentation of hardware electrical systems used in highly integrated process equipment, high-tech instrumentation, any kind of electromechanical, electrical or electronic assemblies, systems, subsystems and products. CablEquity 2006 is a complete end-to-end design and manufacturing solution for hardware system architects and integrators, electrical and electronics engineers and scientists. CablEquity delivers full system design automation resulting in significant cost savings in products development, significant time savings per design, and tremendous productivity improvements.

The new version offers a host of powerful features including ‘pick and drag’ design sketching, automated generation full scale ‘nail board’ drawings, enhanced schematics and bills of materials, fully integrated RoHS compliant components database, and customisable editing assembly drawings.

‘CablEquity has become a very powerful tool for the system level design’.

‘A clear money-saver for companies which are involved in design or manufacturing of mechatronics products’, said Alex Chernyak, President and CEO of TurboTools Corp.

‘An investment in CablEquity produces a substantial return throughout the entire development cycle’.

Prof Marta Rencz has been elected to the Board of Management of the EU-funded Network of Excellence, Patent-DfMM as Manager of the Modelling and Simulation work package.
Prof Marta Rencz has been elected to the Board of Management of the EU-funded Network of Excellence, Patent-DfMM as Manager of the Modelling and Simulation work package. In this capacity she will serve as liaison between the board and the 16 university and industrial partners participating in the simulation activities of the Patent project. Prof Rencz is the head of department of electron devices at the Technical University of Budapest and the CEO of Micred, which was acquired by Flomerics Group in April 2005.

She is on the organising and programme committees of several international conferences and workshops, and has published her theoretical and practical results in more than 250 technical papers.

The NoE Patent-DfMM aims to establish a collaborative team to provide European industry with support in the field of ‘Design for micro and nano manufacture (DfMM)’ to ensure that problems affecting the manufacture and reliability of products based on micro nano technologies (MNT) can be addressed before prototype and preproduction.

The modelling and simulation work package will support the process of robust design, packaging and assembly of the next generation of micro and nano technology based products, working closely with the other technical work packages to address the main research challenges in DfMM.

A collaborative service to industry will be established in the form of a virtual lab.

The work package team includes researchers from 16 European institutes.

The research challenges to be addressed by the partners during the project include: multi-scale and multi-physics modelling; enabling accurate packaging and system simulation; nonlinear behaviour prediction; microfluidics modelling; failure and degradation mode modelling; and definition of a new cross-domain simulation methodology.

A new OEM agreement gives FPGA designers access to a range of performance and productivity benefits using Precision Synthesis within the QuickLogic QuickWorks environment.
Mentor Graphics has signed a multiple-year OEM agreement with QuickLogic Corp. The new agreement offers QuickLogic’s customers a powerful new synthesis solution, and provides for a smooth and easy transition to the full range of advanced FPGA synthesis technology and tools from Mentor Graphics. Through this OEM agreement, FPGA designers get immediate access to a broad range of performance and productivity benefits using Mentor Graphics Precision Synthesis tool within the QuickLogic QuickWorks FPGA development software environment.

Using a highly interactive graphical environment, designers gain the flexibility to cross-probe between HDL and schematic views.

The tool performs ‘what if’ timing analysis with instant feedback, enabling designers to make confident decisions for fast and accurate timing closure.

‘We recognise Mentor Graphics’ commitment to FPGA tools’.

‘Precision Synthesis is being used for FPGA designs with their complex timing challenges and system performance requirements’, said Tom Hart, Chairman, President and CEO, QuickLogic Corporation.

‘We are very pleased to partner with Mentor Graphics in providing our customers with advanced synthesis and debugging capabilities, ease of use and reliability’.

‘Via this important new partnership, we believe that our customers using the Precision Synthesis tool will be able to easily target QuickLogic devices and reach the unprecedented levels of performance and power-conscious functionality needed for their future designs’.

‘This OEM agreement further validates Mentor Graphics continued technology and business leadership in FPGA design tools, and reaffirms our commitment to provide comprehensive solutions for the broadest range of FPGA devices’, said Simon Bloch, General Manager, Design Creation and Synthesis Division, Mentor Graphics.

‘QuickLogic is a low-power programmable logic leader, and this decision to choose Precision Synthesis as its OEM offering is a strong testament to the design, analysis and productivity benefits delivered by our advanced synthesis technology’.

‘Clearly, this partnership will help designers leverage the exceptional value offered by QuickLogic devices, especially in exciting new application areas such as low-power FPGA design’.

Precision Synthesis is scheduled to be fully integrated into the QuickWorks FPGA development software in early 2006.

Users may also run Precision Synthesis QuickLogic Edition in a stand-alone mode and create a standard EDIF (Electronic Data Interchange Format) netlist in the QuickWorks design environment.

The new Precision Synthesis QuickLogic Edition supports QuickLogic’s leading programmable logic devices, including Eclipse I, Eclipse II, QuickMIPs and QuickPCI.

Mobiforms is a revolutionary rapid application development tool for mobile applications on Windows CE, pocket PC, EPOC/Symbian and Palm.
Following customer demand, Mobiforms has incorporated signature capture and sketching capabilities in the latest release of Mobiforms 2.21. Mobiforms 2.21 also includes additional commands in the simple MobiScript language such as if, end if and loops providing true programming power. Mobiforms 2.21 has improved support for Oracle and Sybase databases.

Alternatively, with no database installed Mobiforms can be programmed to read or write to any ASCII file format instead.

Mobiforms is a revolutionary rapid application development (RAD) tool for mobile applications on Windows CE, pocket PC, EPOC/Symbian and Palm.

Mobiforms lets users develop professional applications like asset collection, field service, inspection, market research, site surveys, stock control or workshop management.

Mobiforms boasts the power of a whole army of unrelenting programmers by automating the development process.

The company reckons that with Mobiforms an application that would traditionally take days to write in Java or C++ can be built in minutes.

Asset InterTech’s DFT Analyzer has been honoured with a ‘Best In Test’ award from Test and Measurement World.
Asset InterTech’s DFT Analyzer, billed as the industry’s first design-for-test tool for boundary scan (IEEE1149.1/JTAG), has been honoured with a ‘Best In Test’ award from Test and Measurement World. This marks the third consecutive year that Asset has earned Best In Test recognition. Asset is an international leader in boundary-scan test and in-system programming (ISP).

The previous two years, the company’s ScanWorks JTAG system earned Best In Test honours for being the first boundary scan system to support the testing of high-speed AC-coupled buses under the IEEE1149.6 standard and for its TopCAT technology which significantly accelerates the automatic generation of JTAG tests.

Asset’s DFT Analyzer was awarded an honourable mention in the 2006 Best In Test programme.

‘For ScanWorks to win a Best In Test for two years running and now for DFT Analyzer to win one - we’re just very excited that all of the hard work has paid off with industry recognition’, said Reg Waller, European Director for Asset InterTech.

‘It is particularly heartening this year because DFT Analyzer is the first in its class as a boundary scan DFT tool’.

‘We expect that DFT Analyzer will drive sound boundary-scan DFT practices deeper into the design process and that will generate significant benefits for manufacturers’.

Asset’s ScanWorks is currently deployed by leading electronics companies such as Cisco, Lucent Technologies, Agilent, BAE, Hewlett-Packard, Ericsson, Alcatel, SBS, Intel, Raytheon, Solectron, Rockwell Collins, EMC and many others.

DFT Analyzer reduces manufacturing and test costs by validating the boundary-scan DFT features in a circuit board design before any prototypes are assembled.

This can reduce expensive design respins and schedule disruptions that often result from the discovery of inadequate test coverage when a design moves from development into manufacturing.

DFT Analyzer also determines the extent of the boundary-scan test coverage and recommends changes in the design that would increase coverage.

DFT Analyzer is made up of three tools which are employed at different stages in product development.

First, as schematics are being developed, an automated checklist queries a designer about the testability features in the design.

Next, a design validation tool is launched after computer aided design (CAD) information has been compiled.

Based on the CAD data, the design validation tool determines whether established DFT rules have been broken.

Lastly, test coverage analysis is engaged during the final stages of design before prototypes are manufactured.

This tool determines the extent of boundary-scan test coverage and reports on where physical test points may be eliminated.

LinuxLink subscriptions are available to all customers of popular Intel XScale processors, including the only commercially supported Linux solution for the new Intel IOP342 I/O processor.
TimeSys Corporation is to make LinuxLink subscriptions available to all customers of popular Intel XScale processors, including the only commercially supported Linux solution for the new Intel IOP342 I/O processor. Intel supplies 14-day trial subscriptions of processor-optimised LinuxLink subscriptions in its IOP342, IOP321, IOP331, IOP332 and 80219 I/O processor hardware development kits. At the end of the 14-day subscription, Intel customers will have the option to extend their subscription by choosing among flexible LinuxLink subscriptions available from TimeSys.

The LinuxLink subscriptions that Intel is supplying to developers in its hardware development kits deliver immediate access to the latest Linux port to Intel XScale processors.

This includes hundreds of cross-compiled packages, a processor-optimised cross-development environment, alerts to relevant updates and Developer Exchange access to interactive support from TimeSys, Intel, and the Open Source community.

The combination of features available exclusively through LinuxLink equips new Intel customers to immediately begin Linux development, while providing existing customers with access to the most up-to-date Embedded Linux resource for their processor.

LinuxLink by TimeSys is the first commercial offering to support the majority of embedded developers who build and assemble their own custom Linux platform by delivering on-demand access to continuously updated processor-optimised Linux and components, rich development environment, and community support.

This is a significant departure from commercial Linux vendor distributions that dictate feature sets and release schedules.

‘We look forward to equipping Intel customers with the only enablement model designed to support their efforts to create and maintain their own commercial-grade custom Linux platform’, said Larry Weidman, President and CEO of TimeSys.

Each LinuxLink subscription for an Intel XScale processor includes: hundreds of cross-compiled, ready-to-use packages validated on supported Intel XScale processors, which save weeks or months from the process of gathering, cross-compiling and testing components; the latest Linux kernel distributions from Intel, optimised and tested on supported reference boards for Intel XScale processors, enabling developers to get started out of the box with a commercial Linux solution while receiving updates and patches throughout the development cycle; processor-optimised cross-development environment with compilers, application and kernel debuggers, and platform development tools, enabling developers to focus on application development while simplifying feature, performance, and footprint optimisation for their Linux platform; and participation in the Developer Exchange for online, interactive support from TimeSys, Intel, and the Open Source community, enabling developers to leverage community expertise for help, education, technical information and best practices to support their embedded Linux project.

‘Intel Storage Group engineers maintain the Intel Xscale technology IOP branch of the Linux kernel tree’, said Mike Wall, General Manager of Intel’s Storage Group Marketing.

‘By working with TimeSys to pair our latest Linux Kernel ports with the developer resources available through a LinuxLink subscription, we are giving our customers yet another option when developing systems based on Intel I/O processors’.

The 14-day LinuxLink subscriptions are available through Intel for all new and existing Intel customers with IOP342, IOP321, IOP331, IOP332 and 80219 Intel XScale processors.

Subscriptions can be activated on the TimeSys website.

Longer-term subscription options are available directly from TimeSys.

Cadence Design Systems has become the first EDA technology vendor to provide broad support across its product lines for the Solaris 10 operating system.
Cadence Design Systems has become the first EDA technology vendor to provide broad support across its product lines for the Solaris 10 operating system (OS) for AMD Opteron and Sun UltraSPARC processor-powered Sun Fire clients and servers. In addition, Cadence and Sun have extended their long standing business relationship with the signing of a multiple-year contract for Cadence products and services, and agreed to develop additional solutions that address design challenges at 90nm and beyond. Cadence will be supporting both desktop and server applications from their EDA product line for integrated circuits.

With this broad support, Cadence will offer over sixty applications on four different platforms for the Solaris 10 OS.

‘This collaboration is yet another illustration of Sun’s steadfast commitment to the EDA and desktop markets’.

‘We are very pleased that Cadence has chosen to support the Solaris 10 OS’, said Stephen Borcich, Vice President, Partner Marketing, Sun Microsystems.

‘As a result of dedicated investments in engineering and testing focused on product interoperability, performance optimisation and timely delivery, Cadence customers will be able to easily run Solaris 10, the most advanced operating system on the planet’.

‘The key features of the Solaris 10 OS, including Dynamic Tracing and Solaris Containers, running on SPARC and x64 processor-based Sun Fire servers, will help our customers get better service levels and application performance, as well as protect their software investment’.

‘Cadence works with industry-leading partners to help customers address their most pressing design challenges’, said Ajay Malhotra, Senior Vice President of Marketing at Cadence Design Systems.

‘Today’s news demonstrates Cadence and Sun’s ongoing commitment to help customers with their EDA design challenges while leveraging the compelling benefits of the Solaris 10 OS on SPARC and x64 Sun Fire systems’.

In response to customer demand, Cadence will broaden support for the Cadence Encounter digital IC design platform, the Virtuoso custom design platform, the Incisive functional verification platform, and Cadence Design for Manufacturing (DFM) technologies to include the Solaris 10 OS on Sun Fire x64 (x86, 64bit) servers and clients powered by AMD Opteron processors.

Cadence will provide customers with high performance and scaling, proven high-grade security and a leading high-availability platform with a choice of AMD Opteron, Sun UltraSPARC or Intel processors, all supporting the Solaris 10 OS.

‘With Cadence now supporting the Sun Solaris 10 OS for Sun Fire x64 platforms, our investment is protected with guaranteed compatibility’, said Mike Hames, Senior Vice President, Application Specific Products, Texas Instruments.

‘The same operating system operates on both x86 and x64 systems, with platform feature parity between UltraSPARC-based platforms and x64 systems’.

‘This will help TI to continue delivering quality silicon to our customers’.

As Sun expands its already significant commitment to Cadence solutions, customers stand to benefit through each company’s customer acceptance practice, where customers input directly into product development, as well as binary compatibility and continued support of innovative joint technologies.

Vector Fields will exhibit at RF and Hyper from 21st to 23rd March 2006 in Paris.
Vector Fields will exhibit at RF and Hyper from 21st to 23rd March 2006 in Paris. Since joining Cobham in 2005, the company has been further strengthened by absorbing the Electromagnetics Division of Culham Electromagnetics and Lightning. The company is a supplier of high accuracy robust packaged software with full supporting services through a world wide network.

Chris Riley, a director of Vector Fields will be demonstrating the Concerto version 5 software for RF and microwave design.

For a wide range of applications, including microwave components, patch, horn and wire antennas, microstrip, radar cross-section, antenna coupling and microwave heating, Concerto has established itself as a powerful tool in the designer’s armoury.

The package has been shown to out-perform many of its competitors in both speed and functionality.

The Quickwave simulator using ’state-of-the-art’ FDTD methods has many advantages.

Independent tests against other industry standard time domain software has shown performance that exceeds 10 times in speed, without compromising accuracy.

Memory usage is also very efficient and the software can analyse models with at least twice as many finite difference cells on a standard PC The unique ‘freeze’ feature in Quickwave allows the user to temporarily halt a large simulation, use the PC for other tasks, and then resume the analysis at the freeze point.

This, of course, also allows the user to switch from one Concerto model to another, as business demands take on new priorities Concerto also contains the Clasp method of moments analysis - giving users the opportunity to apply the most appropriate simulation technique for their particular application.

The modular construction of Concerto also brings a further benefit.

While a Quickwave or Clasp simulation is in progress, the user is able to access the geometric modeller or the interactive postprocessor to work on other models, allowing computational resource to be used for maximum effect.

Vector Fields will also be using RF and Hyper Conference to announce Concerto version 6, scheduled for Spring 2006.

The company will also be announcing the new, entry level Concerto Essential package - containing the full functionality of the Professional version but restricted in model size.

This is the ideal introduction to RF and microwave design for new users and also provides experienced engineers the opportunity to update from their existing software for a reasonable cost.

Circuits-Multi-Projects has licensed the ARM RealView Create family of electronic system level tools to drive advanced SoC projects in universities and research laboratories.
Circuits-Multi-Projects (CMP) has licensed the ARM RealView Create family of electronic system level (ESL) tools to drive advanced SoC projects in universities and research laboratories across Europe, Turkey, Egypt and Israel. CMP is already a successful distributor of RealView Developer tools for educational purposes (250 licences already distributed). purposes; through this new licensing agreement, the CMP will be able to provide university students with access to emerging SoC design technology, helping to put those students at the forefront of design research and methodology best practices.

‘The RealView ESL design tools from ARM enable system developers to efficiently and reliably design SoC solutions for next-generation advanced digital products’, said Bernard Courtois, Director of CMP.

CMP has a long history with modelling ARM technology-based digital systems and has already seen the benefits of using RealView tools over this past year.

This agreement will enable us to better educate university students on the most essential element of the SoC design flow’.

‘ARM is committed to helping university students and research specialists stay ahead of the curve with easy access to cutting-edge ARM design tools’, said Thomas Kettler, Business Development Manager, ESL Tools, ARM.

‘By extending its current ARM tools offerings with the entire range of our RealView Create family of ESL design tools, CMP is well-positioned to offer universities and research laboratories an end-to-end solution within the design flow’.

The RealView Create family of design tools uses ESL technology to create a virtual prototype of processor cores and complete SoC designs in the presilicon phase.

As part of this process, SoC hardware architecture and software are tested extensively in the presilicon phase.

The tools work at the cycle-based and transaction-based abstraction level, combining the speed of C/C++ with the accuracy of RTL, to provide a complete platform for modelling and programming multi-core SoCs.

The tools also support the SPIRIT 1.1 standard for ease of integration into downstream RTL and implementation design flows.

As a result, design engineers using the RealView ESL design tools will be able to achieve enhanced end product quality.

The RealView Create family includes the RealView SoC Designer (with MaxSim technology), the RealView Core Generator (with MaxCore technology) and the RealView Model Library.