The new FPGAs are based on second-generation, low-impedance metal-to-metal ViaLink II antifuse technology. Toggle flip-flop speeds exceed 250MHz, data path speeds exceed 150MHz and pin-to-pin delays are under 7 nanoseconds, QuickLogic said.

Cypress, meanwhile, believes it can gain ground fast in the fiercely competitive PLD market by leveraging its own process technology and QuickLogic’s ViaLink antifuse design. Another PLD vendor, Xilinx, last week revealed that it too is “definitely looking at”e developing antifuse FPGAs–despite its commitment thus far to statice-RAM based technology.
Whilee Cypress is betting that it can make big inroads in the FPGA market, some competitors said that remains to be seen. Roger Herbst, Cypress’ strategic marketing manager, PLD products, said, “Manufacturing in volume is really the key here. We don’t intend to cast ourselves as a speede boutique. We have a very cost-competitive process. We’re not looking for a nichee corner of the market, we want to achieve big volume quickly.”

“Cheaper alone is not enough to get an established foothold in the market,” Mr. Herbst said. “Once you have penetrated the market with cheaper products, the guy you sold to will need speed.” He added that getting in is tough, but once there, success comes easier. “The difference between penetrating and proliferating is that once you’re in, proliferating is easy,” he said.

For QuickLogic, its relationship with Cypress is the latest in a series of pacts with development and foundry partners. QuickLogic is switching from its current foundry partner, VLSI Technology, which uses a 1.0 micron process.

QuickLogic orginally developed the ViaLink technology at an Advanced Micro Decives foundry. “Essentially, AMD provided an R&D foundry,” said John Birkner, QuickLogic’s co-founder and vice president, CAE Tools.

Mr. Birkner said VLSI continues to manufacture the 1.0 micro versions of QuickLogic’s FPGAs based on ViaLink I technology, while QuickLogic switches to Cypress as a foundry for its new WildCat products. He left open the possibility that VLSI may be used as a second source for future QucikLogice FPGA products. “That’s not to say we won’t bring up our products on a answer VLSI technology,” Mr. Birkner commented.

Meanwhile, Cypress’ relationship with Altera, another foundry customer, is also changing. Cypress is still manufacturing Altera’s Max 5000 CPLDs and, in fact, is doing a redesign of the Max 5000 products, a Cypress spokesman said.

However, Cypress and Altera have gone their separate ways for the next generation CPLDs. Cypress president and CEO T.J. Rodgers recently said Cypress’ next-generation CPLDs, expected later this year, will be called the 37X family. Altera has introduced its next-generation CPLDs, called the MAX 7000 line–which are not manufactured by Cypress.

As a result, Cypress’ marketing and foundry relationship with QuickLogic may be gaining in importance. In June, 1992, Cypress and QuickLogic signed a joint technology and marketing agreement to develop FPGA products, technology and design tools.

Dan McCraine, Cypress’ vice president of sales and marketing, stated “Cypress has entered the FPGA market with the industry’s highest performance products. Our advancede fabrication facilities and off-shore assembly allow us to provide these devices on a high-volume, low-cost basis. Cypress is well-positioned to quickly gain market share in the high-growth FPGA market.”

Cypress’ Mr. Herbst said that companies with their own fabs have an advantage in the PLD market. “We have our own fab and development and you can do things you can’t do with off-the-shelf. There are four steps in the manufacturing process and you have to control the hell out of those steps. Also, we’ve applied planarization to the wafer. The cost structure drops by 60 percent,” Mr. Herbst added.

SUNNYVALE, Calif. — QuickLogic Corporation (Nasdaq:QUIK), the pioneer of Embedded Standard Products (ESPs) and a leading supplier of uWatt FPGAs, today announced the production availability of military-temperature versions of its popular Eclipse II FPGA product. The Eclipse II family of uWatt FPGAs provide customizable logic solutions for critical military applications including aircraft navigation and flight controls, data recorders, weapons systems and military communications equipment. An increasing number of these applications, such as the Joint Tactical Radio System (JTRS), are becoming portable or battery-operated, fueling a requirement for semiconductor suppliers to these markets to concurrently increase functionality at reduced power consumption.
Traditionally, logic solutions for low power military applications have been implemented exclusively in ASICs, due largely to the fact that FPGAs could not minimize their static and dynamic power consumption to an acceptable level. ASICs, however, require lengthy and highly complex development and debug cycles and have procurement models with large minimum order quantities. The industry-leading low power reality of Eclipse II uWatt FPGAs addresses the needs of these power-critical military application segments such as portable personal communications, global positioning and smart munitions. Additionally, the adoption of a device from the Eclipse II uWatt FPGA family drastically reduces design cycle time to a matter of weeks at a fraction of the total cost of ownership of ASICs.
“QuickLogic has a long track record of delivering programmable logic solutions to a broad spectrum of applications within the military and aerospace market segment. The security, non-volatility and instant-on nature of our patented ViaLink(R) technology make our devices an excellent fit for systems that demand high reliability,” said Brian Faith, Senior Director of Product Marketing.

Technical Information

The entire Eclipse II product family is based on QuickLogic’s patented ViaLink metal-to-metal programmable interconnect technology, enabling the low power, non-volatility, and security demanded by rugged military applications. The quiescent current of the Eclipse II products are as low as 70 uAmps at 125C, two orders of magnitude lower than competitors’ FPGAs under comparable conditions. Densities range from 47K to 320K system gates. Eclipse II incorporates embedded dual-port SRAM and supports a wide range of I/O standards to enable several board-level components to be integrated into a single chip. For technical information and specs, go to www.quicklogic.com/lowpower.

Software and Intellectual Property Support

The Eclipse-II FPGA family is supported in QuickLogic’s QuickWorks version 9.7 development tool suite and is available for download from www.quicklogic.com/software. QuickLogic offers Intellectual Property targeted specifically for Eclipse-II FPGAs including industry-standard memory and I/O bus interfaces, DSP functions, CPU cores and other commonly used peripherals.

Pricing and Availability

The Eclipse-II Mil-Temp FPGA family of devices starts at $15.00 in 5K piece quantities. For additional company and product information, please go to www.quicklogic.com.

Safe Harbor Statement

This news release contains forward-looking statements based on current expectations that involve risks and uncertainties. QuickLogic’s actual results may differ from the results described in the forward-looking statements. Factors that could cause actual results to differ include, but are not limited to, general conditions in the semiconductor industry, development risks, market acceptance and the impact of competitive products. These and other risk factors are detailed in QuickLogic’s periodic reports and registration statements filed with the Securities and Exchange Commission.

Altera and Commsonic are working on the industry’s first multichannel single-chip FPGA solution integrating the entire forward error correction and modulation chain for digital broadcast over cable.
Altera Corp and Commsonic have formed a partnership to deliver the industry’s first multichannel single-chip FPGA solution integrating the entire forward error correction (FEC) and modulation chain for digital broadcast over cable. The solution is fully compatible with the ITU-T J.83 Annex A, B and C standards adopted in Japan and North America, and the European DVB-C standard. The solution will enable broadcast OEMs to deliver highly cost-effective equipment that targets intelligent video networks for ‘on-the-fly’ reconfiguration of bandwidth-on-demand, resulting in networks with the highest performance and flexibility at the lowest possible cost.

The two companies also plan to develop professional modulators/demodulators for the DVB satellite version 2 (DVB-S2) and DVB satellite (DVB-S) standards as well as other cable, terrestrial, and satellite applications before the end of the year.

‘The innovative DSP and RAM architectures in Altera’s Stratix II and Cyclone II FPGAs are very well suited to our technology because they consistently deliver a higher symbol rate per gate than is possible with other comparable platforms’, said Commsonic Director Paul Rudkin.

‘For example, we believe that Stratix II FPGAs may be the only cost-effective route to achieve the 300Mbit/s throughput target we have set for our FPGA DVB-S2 demodulator’.

Commsonic has already developed single-channel modulators for DVB-C and the COFDM-based DVB terrestrial (DVB-T) standards that are optimised for Stratix II and Cyclone II FPGAs.

Altera will demonstrate the Commsonic solutions during this year’s International Broadcast Convention (IBC2005) in Amsterdam at Booth 10.420.

‘Many leading manufacturers have realised the advantages of Altera’s broadcast solutions and products and are now relying on Altera-based platforms to create and deploy flexible, future-proof and cost-effective products for the broadcast industry’, said Todd Scott, Senior Director of Altera’s Digital Consumer and Broadcast Business Unit.

‘Commsonic’s highly integrated cable modulation family is providing another major step forward in broadcast equipment size reduction’.

Altera will showcase its portfolio of leading programmable solutions for the broadcast industry at IBC 2005 in Amsterdam beginning this Thursday.
Altera will showcase its portfolio of leading programmable solutions for the broadcast industry at IBC 2005 in Amsterdam beginning this Thursday. Altera’s programmable solutions for the broadcast industry feature the industry’s first FPGA-based sample rate convertor (SRC), video distribution over IP, single-chip H.264 standard definition encoding and other innovations. These solutions give developers of broadcast applications high levels of flexibility compared with ASIC-, ASSP- and DSP-based platforms in the development and deployment of audio and video applications.

‘For Altera’s third participation at IBC, we are demonstrating our commitment to providing the broadcast industry with programmable solutions that can help developers build leading-edge products cost-effectively’, said Todd Scott, Senior Director of Altera’s Digital Consumer and Broadcast Business Unit.

‘As we continue to develop and deliver solutions optimised for broadcast applications, Altera can help customers be successful in meeting their time-to-market goals while giving them the flexibility to successfully respond to rapidly evolving industry and customer requirements’.

Altera works closely with its customers to understand their business and engineering objectives.

Many customers use Altera’s technology to reduce their chip count by integrating several functions into a single FPGA, allowing them to reduce costs and be more successful in the marketplace.

Altera offers the industry’s highest-density and lowest-cost FPGAs and maintains a track record of delivering new generation products on schedule.

Because of Altera’s technological and operational excellence, broadcast developers can focus on core competencies and devote more resources to the creation of innovative applications.

Visitors to Booth 10.420 at IBC2005 will see demonstrations of cost-effective, performance-intensive video and audio standards implemented in FPGAs, including: the industry’s first FPGA-based SRC solution for integrating multiple audio interfaces onto a single chip; a video-over-IP reference design for transmitting compressed video; a single-chip H.264 standard-definition FPGA solution; and a single-chip ASI to DVB-T and DVB-C modulation solution.

Actel has unveiled the industry’s highest density radiation-tolerant field-programmable gate array for space designs.
Building on its rich heritage in the space design community, Actel has unveiled the industry’s highest density radiation-tolerant field-programmable gate array (FPGA) for space designs. The four million gate RTAX4000S expands Actel’s antifuse-based RTAX-S family in order to deliver highly reliable solutions with significant advantages over competing FPGA and radiation-hardened (RH) ASIC devices for demanding space applications requiring high gate counts. These include satellite payload systems, such as data processing applications in communications, and earth observation and scientific satellites.

This latest member of Actel’s RTAX-S family will offer four million system gates (500,000 ASIC gates) with an I/O count of 840 and 540Kbit of embedded memory.

‘The RTAX4000S device combines unparalleled density with fast design turnaround, providing space designers with the ability to save board space and system mass without incurring RH-ASIC lead time or tooling charge penalties’, said Ken O’Neill, Director, Military and Aerospace Product Marketing at Actel.

‘Further, because the SEU-hardened RTAX4000S device does not require customer-initiated triple module redundancy, which reduces effective gate counts by up to two thirds, Actel is able to deliver a density that far exceeds the densities offered by competing SRAM-based FPGA devices’.

Compared with RH-ASIC solutions, the RTAX4000S will deliver cost and time-to-market advantages.

RH-ASICs can deliver high gate counts, but they require a large up-front tooling charge that, in combination with the minimal volume requirements for many of these applications, often translates into a higher total unit cost.

In addition, the lead times for RH-ASICs can be long, often making them a last resort.

Changes to the ASIC design, whether due to design error or a change in the specification, will require the customer to pay a portion of their engineering expenses again and may cause a schedule delay.

With a programmable fabric, customers can take advantage of the flexibility to make design changes without impacting schedule and overall system cost.

The four million-gate RTAX4000S will offer the same radiation performance as existing members of Actel’s RTAX-S family of FPGAs as well as the same advanced features, including embedded RAM with error detection and correction (EDAC), high I/O count and multiple I/O standard support.

Other advanced features include: flip-flops that are practically immune to single-event upsets (SEUs); memory upsets of less than 1e-10 errors/bit-day; single event latch-up (SEL) immunity to greater than LETTH 104MeV-cm2/mg; immunity to configuration upsets; and total ionising dose (TID) resistance to 300Krads (functional) - exceeding the requirement for most space applications.

With the RTAX4000S, users will be able to conduct post-programming burn-in using generic burn-in boards and vectors.

A packaged version of the RTAX4000S that is not flight worthy will be available so that customers may test and validate their designs using silicon with architecture, density and timing properties identical to the flight FPGAs.

Software support for the RTAX4000S is available now, and hardware prototypes are expected to be available in Q1 2006.

Actel has revealed an extensive product roadmap that will enable military and aerospace engineers to develop system designs with high reliability, advanced features and superior performance.
Providing the military and aerospace markets with a clear path to future designs, Actel has revealed an extensive product roadmap that will enable military and aerospace engineers to develop system designs with high reliability, advanced features and superior performance. As part of the roadmap, Actel plans to deliver the first Flash-based live-at-power-up FPGA for space applications, enabling easy prototyping and in-space reconfigurability. Actel’s roadmap also includes two additions to its existing antifuse-based families.

The new RTAX4000S device will be the industry’s highest density radiation-tolerant FPGA at 4 million system gates.

Further, the onshore-manufactured RHAX250S device, based on Actel’s existing RTAX250S device, will be radiation-hardened assured (RHA) and offer a guaranteed high total dose rating with QML class-V screening.

‘The minimal form factor of our single-chip devices and their high radiation tolerance have allowed Actel to rise above the competition in the military and aerospace markets’, said Ken O’Neill, Director, Military and Aerospace Product Marketing at Actel.

‘In addition, we continue to develop new technologies for the space industry that will push densities to new levels and drive innovation in features and performance while offering extremely high reliability’.

Actel’s Flash-based FPGAs for space applications will bring a unique set of advantages for system designers.

Like Actel’s other space-flight FPGAs, the devices will be single chip, for minimum board space and weight, and practically immune to radiation-induced single-event upsets (SEUs).

In addition, the devices’ reprogramability will be useful for quick prototypes and in-flight reconfigurability.

These devices will be extensively modified for space-flight applications and will have higher radiation tolerance than the equivalent commercial parts.

The RHAX250S device, derived from the company’s successful RTAX-S family, is a rad-hard 250,000-system-gate FPGA that is planned for manufacture at BAE Systems’ RH CMOS foundry in Manassas, Virginia.

The BAE Systems foundry will give the product two distinct benefits for space-flight customers: it will be an RHA product with a high guaranteed total dose rating with QML class-V screening and will also be manufactured entirely within the continental USA, as required by the recent ‘trusted foundry’ initiative established by the US Department of Defense.

No competitor today offers an RH-FPGA of this density level from an onshore foundry.

Products are planned for delivery by the end of 2006.

As part of its ongoing effort to support the military and aerospace markets, Actel will continue to develop military-temperature plastic, military-temperature hermetic and MIL-STD-883 Class B versions of the company’s commercial products.

As designers of space systems generally require that new technology first obtain an established track record of reliability in non-mission-critical applications, Actel maintains a philosophy of developing and delivering products to its commercial customer base and then enhancing those product offerings for the high-reliability community.

Further, Actel provides support to its military and aerospace customers with a high-reliability tools package that offers a comprehensive selection of tools for synthesis, functional verification and the implementation of DSP functions.

Silica and Xilinx have extended their long-term European franchise agreement to cover the UK, Ireland, Norway, Sweden, Finland, Switzerland and Austria.
Semiconductor distributor Silica and Xilinx, the world’s leading supplier of programmable logic, have revised their long-term European franchise agreement. With immediate effect, the established strategic partnership will be extended to the UK, Ireland, Norway, Sweden, Finland, Switzerland and Austria. As an effect of Avnet’s acquisition of Memec earlier this year, the strategic decision to concentrate resources for Xilinx technology within Silica will increase efficiency and enhance service to customers.

Although Silica is already strongly positioned as a distributor in Central, Western and Southern Europe for Xilinx, the company plans further heavy investment in additional resources.

A significant portion of these resources will consist of dedicated and experienced Xilinx field application engineers and sales personnel, coming from the Memec organisation.

Commenting on the distribution agreement, Miguel Fernandez, Silica President, said: ‘This expansion marks a significant milestone in our relationship with Xilinx, since it documents a mutual trust’.

‘We will undoubtedly provide first class design-in support and second to none logistic services for their products, helping to develop the Xilinx business across Europe’.

‘At the same time, we ensure that Silica’s broader customer base can fully exploit the advantages of Xilinx world-class technology’.

‘The Xilinx franchise within Silica will help us for even further growth across the whole electronics distribution value chain’.

‘However, our dedication, specialisation and focused line card will remain unchanged’.

Alan Woodley, Xilinx Area Director, Business Development Group EMEA, commented: ‘Silica represents an excellent distribution partner for Xilinx’.

‘They have the right infrastructure, resources and capabilities to meet the technical and commercial needs of our vast number of customers’.

‘We are looking forward to now leveraging Silica’s distribution expertise for our customers on a pan-European basis’.

‘I am confident that Silica will continue to drive the proliferation of our world-class programmable logic portfolio’.

Highlights of the Xilinx product and technology range include the Virtex and Spartan FPGA series as well as the CoolRunner CPLD portfolio.

Silica also provides a line of development boards to help customers develop and test design concepts using Xilinx devices.

Anglia has appointed two senior personnel to augment its technical marketing team.
Electronic components distributor Anglia has appointed two senior personnel to augment its technical marketing team. Maurice Banting and Gordon Bullows will respectively be providing business development effort and applications support for Anglia’s semiconductor franchises, including the recent addition to its portfolio, Lattice Semiconductor. Maurice Banting becomes Anglia’s Business Development Manager for Semiconductor Products, with the benefit of over 20 years experience in the semiconductor industry.

Banting began his career as an engineer with Texas Instruments before moving into applications engineering, product management and more recently business development.

He has worked for a number of well-known semiconductor manufacturers and distributors, including Memec and MMD, and his wide range of experience includes providing technical support for programmable logic devices from both Intel and Altera.

Gordon Bullows joins Anglia as a Field Applications Engineer for FPGA and ancillary products.

Bullows has worked in the electronics industry for 19 years, having begun as an engineer at EEV Chelmsford working on the development of thermal imaging technology.

He has spent most of his career in the active components sector, and for the past 9 years has worked in a variety of applications and product management roles with both distributors and semiconductor manufacturers, most recently with STMicroelectronics.

Highlights include managing a team of engineers based in Noida, India working on system-on-chip devices, and support of a development project in China.

Commenting on the appointments, Lee Nye, Anglia’s Marketing Director, said: ‘In today’s tough electronics distribution environment it is a sign of Anglia’s strength that it is still expanding its workforce when many others are consolidating or shrinking’.

‘Our recent string of new semiconductor franchises has brought with it the need to recruit several more specialists into our technical marketing department, which now consists of more than 20 people’.

‘Both Maurice and Gordon bring a wealth of experience to our team - we welcome them warmly and look forward to working with them’.

Tokyo-based NEC Corp has elected to use Cyclone FPGAs and MAX 3000 CPLDs in its 3GPP W-CDMA macro basestations that support high-speed downlink packet access (HSDPA).
Tokyo-based NEC Corp has elected to use Cyclone FPGAs and MAX 3000 CPLDs in its 3GPP W-CDMA macro basestations that support high-speed downlink packet access (HSDPA). NEC selected Altera devices because of the cost benefits as well as Altera’s extensive lead-free programmable logic product offering. ‘By choosing Altera, we gained access to the lowest-cost FPGAs and CPLDs in the world and were able to take advantage of their considerable experience with 3G wireless technology’, said Dr Nobuhiro Endo, Senior General Manager of the Mobile Network Operations Unit at NEC.

‘As a result, we were able to jointly architect an innovative and world-class DSP solution for our W-CDMA macro basestation’.

‘We also shared product roadmaps and established a clear path to further cost reduction with Altera’s Cyclone II and MAX II device families’.

Altera’s extensive support for wireless infrastructure development includes both device and intellectual property (IP) solutions for HSDPA basestations.

Cyclone series FPGAs deliver unparalleled performance for digital signal processing (DSP) and other functions implemented in HSDPA basestations, at the lowest cost.

Additionally, Altera DSP IP MegaCore functions address many of the high-speed signal processing requirements of the baseband modem and digital intermediate frequency (IF) functions.

HSDPA is a significant enhancement to W-CDMA and can achieve speeds up to 14.4Mbit/s.

The 3GPP, a collaborative project for global standardisation of third-generation mobile communication systems, has specified HSDPA technology to address the growing demand for data services and mobile multimedia such as digital images, movies and video conferencing.

Based on W-CDMA, NEC’s next-generation mobile network products achieve high bandwidth by complying with the 3GPP Release 5 standards, which require support for HSDPA service.

‘We are committed to working with communications technology leaders such as NEC to bring the world’s most advanced wireless networks, including 3G and beyond, to reality’, said Arun Iyengar, Senior Director of Altera’s Wireless Business Unit.

‘Both the Cyclone and MAX families provide the flexibility, performance and densities required to meet the challenges of high-bandwidth mobile infrastructure system design at the lowest cost’.

QuickLogic Europe has entered into a design service agreement with Amkor Technology.
QuickLogic Europe has entered into a design service agreement with packaging leader Amkor Technology. Under this agreement, QuickLogic will have access to a broad range of Amkor’s package design and design chain management services, creating a programme that elevates the package development process to a new level of time-to-market performance. Acknowledging the reality of rising hard costs associated with package manufacturing, Amkor is helping its customers manage their overhead or soft costs associated with package development by offering service level agreements that provide guaranteed levels of design chain support services.

‘The goals of this programme are to streamline overhead costs throughout the design chain, shorten design cycle times, and ultimately provide our customers with the opportunity to cost-effectively accelerate their time to market’, said Steve Lowder, Amkor’s VP of Design Services.

‘With increasing design activity for a broad range of end-product applications, it is important to align our resources with the needs of our customers to ensure that they have access to Amkor’s world-class design resources’.

‘We believe that broad adoption of service level agreements will foster improved management of design processes across the electronics supply chain’.

This strategy comes at a time where many semiconductor companies are looking for innovative ways to manage their costs in the face of increasing raw material prices and tight manufacturing capacity.

‘Amkor’s design service agreement fits into our overall strategy of identifying world-class partners and programmes who can help us cut product development time and costs and help us deliver high quality, ‘best price’ low-power FPGAs’, said Owen Bateman, Sales Director at QuickLogic Europe.