EL SEGUNDO and SAN DIEGO, Calif. - July 20, 2006 - Applied Wave Research, Inc. (AWR[R]) and Peregrine Semiconductor today announced the availability of a process design kit (PDK) for Peregrine’s UltraCMOS complimentary metal oxide semiconductor (CMOS) silicon-on-sapphire (SOS) process in AWR’s Analog Office[R] design suite, a software product developed specifically for analog and radio-frequency integrated circuit (RFIC) design. The delivery of the UltraCMOS Process Design Kit is the first step in a long-term collaboration between the two companies to deliver complete RFIC design solutions for specialized high-frequency RF applications. Analog Office design software and the UltraCMOS Process Design Kit will help design engineers significantly shorten IC development cycles, accelerate tape-out to Peregrine’s process, and speed wireless products to market.
“Peregrine Semiconductor is a global leader of high-performance RF CMOS solutions and its UltraCMOS process technology drives unprecedented levels of monolithic integration throughout a broad portfolio of mixed-signal RFICs,” said Sarkis Narkizian, vice president of RFIC business development at AWR. “The open Analog Office RFIC design platform and the UltraCMOS Process Design Kit coupled with Peregrine’s semiconductor manufacturing leadership will result in a top quality design solution that will greatly benefit not only the customers of both companies, but the high-frequency design community as a whole.”

“Peregrine is pleased to offer an UltraCMOS Process Design Kit for AWR’s Analog Office design environment,” said John Sung, director of CAD engineering at Peregrine. “After using Analog Office during the PDK development process, our designers were impressed with the tight electrical and physical integration, ease-of-use, and the environment tailored for high-frequency RF designers. The PDK includes a complete set of validated schematic symbols, simulation models, and fully parameterized layout cells that are characterized to match the UltraCMOS process performance.”

The newest AWR-based PDK is based on the GA and GC variants of Peregrine’s UltraCMOS process, which enables the combination of high-performance RF, mixed-signal, passive elements, nonvolatile memory, and digital functions on a single device without blocking capacitors. By utilizing a sapphire substrate, which is a near-perfect insulator, UltraCMOS wafers enjoy low defect density for simpler construction; dielectrically isolated transistors for excellent power handling and multiple thresholds; and inherent CMOS logic levels. UltraCMOS delivers the fundamental reliability, cost effectiveness, high yields, scalability, and monolithic integration of standard CMOS, while achieving peak RF performance traditionally expected from the more exotic process technologies.

First a signal in simple terms-in process automation, it is a physical variable whose parameters carry information about another variable. Signal conditioning is processing the form or mode of a signal to make it intelligible to or compatible with a device. This includes manipulation such as pulse shaping, pulse clipping, digitizing, and linearizing. Signal conditioning also can refer to modules that perform signal conversion, buffering, isolation, or mathematical operations on the signal when needed. For analog data, a signal conditioner is a circuit module that offsets, attenuates, amplifies, linearizes, and/or filters the signal.
The SensorLex 8B isolated analog signal conditioners provide Instrument Class performance in a package 20% the size of competing modular products. The small size is suited for embedded or portable applications such as mobile test stands, COTS military and defense applications, miniaturized security and surveillance systems, embedded process controls for semiconductor manufacturing equipment, and any other embedded industrial data acquisition system.

The 8B line of miniature isolated analog signal conditioners provides 17 family groups with a total of 102 models that interface to a wide variety of voltage, current, temperature, position, frequency, and strain measuring devices. Housed in a solidly potted thermoplastic plug-in-the-panel package measuring only 1.11 × 1.65 × 0.4 inches, the 8B’s industrial enclosure provides impact properties, dimensional stability over temperature, chemical resistance, and a flammability rating of UL-94 V-0. The line will also be available in a DIN mount configuration in the near future.
Analog signal conditioners

The MINI MCR signal conditioning family, with its 6.2mm housing and power bussing capabilities, is designed to save space and reduce installation time. Universally configurable and dedicated versions of the modules are available to convert signals from RTDs, thermocouples, and various analog sensors. A signal splitter, single and multi-channel, loop powered modules are also available.

Application flexibility is achieved by custom configuration of measuring range settings, input type selection, and three possible methods of powering the modules. Discrete wiring for power is no longer necessary with the optional system power supply, power terminal block, and T-foot power bus coupler that mount on the DIN rail. These hot swappable modules are simply snapped on to the T-foot bus connector without removing any bus bars or bridging.
Pressure sensor

The ASCX Series Compatible pressure sensor is an alternative source to the ASCX Series pressure sensor discontinued by Honeywell. The sensor features pressure ports, mounting holes, and pin geometry that are mechanically compatible to the Honeywell sensor. The ASCX Series Compatible pressure sensor has a ratiometric output span of 4.5 volts at a 5-volt supply. Pressure ranges are available from 1 PSI to 100 PSI. The 4-pin out design is electrically compatible to the ASCX Series pressure sensor. Pressure characteristics including temperature effects of offset as well as output span are also comparable or exceed the ASCX Series pressure sensor.

A new family of ECL devices is targeted at OC-48 grade applications such as routers, switches and 3G basestations where jitter management is a critical issue in overall system performance
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ON Semiconductor has released three ECLinPS MAX devices - the first members of a new family of emitter coupled logic (ECL) devices targeted at OC-48 grade applications such as routers, switches and 3G basestations where jitter management is a particularly critical issue in overall system performance.

The ECLinPS MAX devices offer 200fs typical jitter performance and are targeted specifically at clock distribution functions, a major source of signal distortion in these types of high-speed communications systems.

“Every high-speed serial link designer struggles to meet a total jitter budget”, said Dr Howard Johnson, noted author of “High-speed digital design: a handbook of black magic” and “High-speed signal propagation: advanced black magic”, a signal integrity columnist for EDN, and a technical workshops instructor for digital engineers at Oxford University.

“Anything that provides more margin in that budget helps”.

“Low-jitter clock distribution definitely relieves pressure on the jitter budget - making the rest of the design that much easier”.

The ECLinPS MAX family of devices offer a highly flexible means to route clock and data signals through ultra precise system designs and across backplanes, functioning as translators, receiver/drivers and clock distribution products.
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The outstanding jitter performance of the devices allows designers to: increase the depth of their clock trees while staying well within jitter budgets; minimise the possibility of incorrect data latching; increase likelihood of maintaining lock on clock sources; and improve the speed of obtaining lock after a field board swap.

The NB6L11 1:2 differential fan-out buffer is ideal for applications requiring very fast AC performance and features 160ps typical propagation delay and supports input clock frequencies greater than 6GHz and maximum input data rates typically greater than 6Gbit/s.

Typical RMS jitter for this device is 200fs.

The NBL16 1:1 differential fan-out buffer offers similar input clock and data range specs and has an input propagation delay spec of 135ps.

With output transition times of 70ps it is ideally suited for interfacing with high-frequency and low-voltage (2.5V) sources.

Typical RMS jitter for this device is 200fs.

The NB6L239 differential clock divider is an advanced clock distribution IC with dual divider outputs, allowing for two separate clock signals to be distributed from a single reference input.

The first division bank offers divide by 1, 2, 4, and 8 ratios while the second provides divide by 2, 4, 8, and 16 ratios.

This allows an external 622MHz reference to be used to generate 38.8 to 622MHz outputs.

Additionally, the NB6L16 and NB6L11 are pin-for-pin upgradeable from their predecessor ECLinPS Plus versions.

Increasingly, networking and server designers are forced to make trade-offs between excellent jitter performance and affordability in their choice of ECL devices.

The new ECLinPS MAX family of products delivers AC performance - specifically outstanding jitter and skew that is closer to ON Semiconductor’s industry leading, highest performance silicon-germanium-based GigaComm devices, but at a price-point much closer to the company’s standard bipolar ECLinPS Plus family.

As an added benefit to designers with limited power budgets, the new devices consume up to 50% less power than the company’s highest performing devices.

The NB6L11 and NB6L16 are packaged in the 8-pin, SOIC package and priced at $3.55 per unit in 10,000 unit quantities.

The NB6L239 is available in a 16-pin QFN that measures 3 x 3mm and priced at $4.60 per unit in 10,000 unit quantities.

Fairchild Semiconductor has released a number of 4, 6 and 8-bit LCX and VCX series low-voltage logic functions in the DQFN form factor
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Fairchild Semiconductor has released a number of 4, 6 and 8-bit LCX and VCX series low-voltage logic functions in the DQFN (depopulated very thin quad flat-pack no leads) form factor. DQFN, the industry’s smallest package for quad, hex and octal logic functions, represents a 75% space savings over traditional TSSOP (thin shrink small outline package) devices.

DQFN is the optimal solution for facilitating feature additions in next-generation cellphones, digital cameras, camera-phones and other ultraportable battery-powered applications.

DQFN provides a number of important design benefits.

Noise and crosstalk between I/O terminals is reduced compared to leaded packages due to the lower capacitance and inductance of DQFN.

Chips in DQFN also run cooler than in leaded packages due to the exposed die attach paddle underneath.

DQFN has visible solder joints that facilitate easy inspection.
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DQFN packaged logic is second-sourced for assured supply.

“DQFN’s smaller form factor enables more compact designs”, says Ken Murphy, Fairchild’s Marketing Manager for Logic Products.

“For example, the 74LCX138BQX decoder/demultiplexer in DQFN can expand the available control signals from the microprocessor to the LCD display and LED drivers for MP3 players, while conserving space”.

Currently available LCX and VCX series devices in DQFN include: the 74LCX245BQX 2.5 to 3.3V bidirectional octal transceiver with 5V tolerant inputs and outputs; the 74LCX244BQX 2.5 to 3.3V octal buffer line driver with 5V tolerant I/O; the 74LCX138BQX 2.5 to 3.3V (1-of-8) decoder/demultiplexer with 5V tolerant I/O; the 74VCX08BQX 1.2 to 3.3V quad dual-input AND gate with 3.6V tolerant inputs; and the 74VCX245BQX 1.4 to 3.3V bidirectional octal transceiver with 3.6V tolerant inputs.

Fairchild’s LCX and VCX logic functions are fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low power dissipation.

All models implement the company’s patented noise/EMI reduction circuitry and support live insertion/withdrawal.

Electrostatic discharge (ESD) performance is exceptional, with machine and human body models rated at greater than 200 and 2000V, respectively.

All part numbers are available in 3000-piece tape reel formats compatible with high-speed manufacturing processes.

The introduction of these low-voltage logic products in DQFN further expands Fairchild’s innovative package offering that includes FLMP, MicroPak and BGA form factors.

These lead-free (Pb-free) products meet or exceed the requirements of the joint IPC/JEDEC standard J-STD-020B and are compliant with the European Union requirements that will take effect in 2005.

A new family of PC clock devices targets next-generation desktop PC platforms for the performance and mainstream markets
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The product family includes the industry’s first four-PLL-based PC clock device (CV115C) for these markets, enabling complete and independent control of key clock circuits within the system thereby resulting in increased flexibility and system performance. More specifically, the new IDT CV115C is the only product on the market to offer independent clocking for PCI Express, making it an appropriate fit for next-generation desktop PC platforms.

In addition to independent clocking for PCI Express, the IDT CV115C PC clock also offers independent clocking of CPU, SATA (Serial ATA) and USB interfaces, allowing each clock to be individually optimised within the system, resulting in superior performance.

A new VDD-suspend pin allows programming to be maintained in power-down mode, with power consumption less than 1mA.

The IDT CV115C architecture also incorporates programming that enables a linearly scalable frequency adjustment as opposed to the commonly used discrete stepping approach, allowing enthusiasts the ability to fine-tune their system for better performance.
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In addition, with independent spread-spectrum control (SSC), each of the three SSC-capable PLLs within the device can be programmed independently to reduce EMI within the system.

“IDT has delivered a four PLL-based PC clock, offering features and benefits that complement the performance requirements of our next-generation Intel Desktop Boards”, said Mark Shipman, Director, Intel Desktop Board Operations.

“We are pleased to provide this new capability to our customers”.

IDT also unveiled a suite of three-PLL-based PC clocks (CV110J, CV123B) that are also targeted at the next-generation desktop PC market.

ON Semiconductor has expanded its 100-plus MiniGate portfolio with a series of new sub-1V logic devices in tiny SOT-553 packaging
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Delivering operating voltages of 0.9 to 3.6V and ultralow propagation delay time as low as 1.5ns, these devices are ideal for portable and consumer electronics applications such as cellphones, MP3/MPEG-4 players and portable video equipment. “Our customers are demanding ultralow operating voltage, for low power consumption and are unwilling to sacrifice speed or drive characteristics”, said Dan Huettl, ON Semiconductor Director of Standard Logic Products.

“The small footprint leaded package of the NL17SVxxXVT52 devices enables the use of the same visual/mechanical inspection equipment set that nearly all manufacturers currently have in place, without sacrificing speed, drive, small size or ease of assembly”.

ON Semiconductor is the first supplier to introduce logic gates with both sub-1V operating voltage and high-speed performance in the industry’s smallest leaded logic gate package.

The new NL17SVxxXV5T2 single gate sub-1V family is available in the five-leaded SOT-553 surface mount package.

All six of the newly released devices are fully specified to operate as low as 0.9V.

The SOT-553 package - which measures only 1.6 x 1.6 x 0.6mm - offers the smallest footprint of any 1.0V logic family in a leaded package.

The SV family offers a wide operating voltage (0.9 to 3.6V), extremely small propagation delay of less than 2.0ns at 3.0V.

The devices deliver a very strong drive capability (+/-24mA at 3.3V) and are lead (Pb) free.

The devices are priced at $0.14 per unit in 10,000 unit quantities.

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Eight new NanoSwitch digital bus switch products are ideally suited to address the operational requirements of next generation servers, RAID, Super VGA, memory bank switching, and high-performance networking/telecomms backplanes. The PI3CH family of low-voltage (2.5/3.3V), high-bandwidth (500MHz) bus switches offer expanded performance capabilities that meet the challenges of advanced performance communication buses like PCI-X, as well as emerging DDR-I / DDR-2 memory standards, and also simplifies the I/O migration from parallel to serial differential signalling standards.

Key performance features in this product family include very flat on-resistance (5ohm - flat) across the full device bandwidth, and very low on/off capacitance (5-10pF) that enables the switches to be used in applications to reduce bus loading.

The 5V I/O tolerance and beyond rail-to-rail capability makes the PI3CH switches ideal for bridging legacy 5V I/O based platforms to next generation 2.5/3V systems.

“Pericom’s number-one position in digital bus switches over the past two consecutive years has provided us with an intimate perspective on the industry, and has enabled us to focus our technology to help drive unparalleled performance levels”, explained Jeff DeAngelis, Director of Product Marketing.
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“This product line extension helps rejuvenate the design engineer’s toolbox by offering new performance alternatives never believed possible in digital bus switch technology”.

Key features include: high signal passing bandwidth (500MHz); beyond rail-to-rail switching; 5V tolerant I/O with 3.3V supply; 2.5 and 3.3V supply voltage operation; hot-insertion capable; industrial operating temperature -40 to +85C; and lead-free packaging available.

Free product samples, datasheets, Ibis models, technical support, product presentation, and application note are available today on the company website.

The devices are housed in a variety of performance and space saving packaging ranging from TSSOP to ultracompact TDFN.

A new low-voltage 2bit logic-level translator from Fairchild Semiconductor combines a wide voltage range with ‘output enable’ (tristate) capability and ultracompact packaging.
A new low-voltage 2bit logic-level translator from Fairchild Semiconductor combines a wide voltage range with ‘output enable’ (tristate) capability and ultracompact packaging. The FXL2T245L10X is ideal for use in digital circuits to translate from lower to higher logic levels or vice versa, especially 1.2, 1.5, 1.8, 2.5 and 3.3V. The translator’s 1.1 to 3.6V range provides a lower voltage threshold than most alternatives, allowing it to better accommodate the low voltage needs of ultraportable applications, including cellphones, digital cameras and notebooks.

Packaged in a space-efficient 10-terminal MicroPak, Fairchild’s FXL2T245L10X is especially useful for ‘transparently’ adding two additional bits to an existing bidirectional translation path, such as a higher-definition LCD or stand-alone 2bit translation solution for USB port data I/Os, including Memory Stick, and other memory modules.

‘The FXL2T245L10X represents Fairchild’s continuing commitment to provide designers with the flexibility to match microprocessor I/Os to a broad range of higher and lower voltage functions’, says Ken Murphy, Fairchild Marketing Manager for Logic Products.

‘As product features are added in ultraportable appliances, designers are increasingly utilising more logic devices to resolve the mix of operating voltages’.

‘Fairchild’s 1, 2, 4, 5, 8 and 16bit logic level translators in DQFN, BGA, and MicroPak provide solutions to such problems, while requiring the minimum amount of board space’.

Like other FXL series translators, the lead (Pb)-free FXL2T245L10X meets or exceeds the requirements of the joint IPC/JEDEC standard J-STD-020B and is compliant with European Union requirements now in effect.

Inphi Corp reckons it has developed the world’s first double datarate (DDR2) configurable registered buffer with parity checking operating at 800Mbit/s.
Inphi Corp reckons it has developed the world’s first double datarate (DDR2) configurable registered buffer with parity checking operating at 800Mbit/s. A member of the Inphi ExacTik Family of industry-leading precision timing devices, the new product complements the company’s DDR2 registered buffers with parity checking operating at 400, 533, 667 and 800Mbit/s. The Inphi product, SSTUB32866 supports all existing standards of DDR2-400 and DDR2-533 as well as standards for server memory operating at DDR2-667 and DDR2-800 rates.

The new registered buffer allows customers to immediately incorporate the world’s most advanced timing devices into their high performance workstations, middle and high performance servers, and high reliability systems, while capitalising on higher datarate DDR2 technology.

‘This new product highlights Inphi’s commitment to working closely with JEDEC and our customers, to rapidly integrating newly-defined technology, and to leveraging our technology and manufacturing expertise to deliver the world’s highest precision solutions’, said Desi Rhoden, Chairman of the JEDEC Memory Committee and Executive Vice President of Inphi Corp.

‘This product further extend Inphi’s market lead, making Inphi the world’s only logic vendor to delivers all five registers for DDR2 operating at 400, 533, 667 and 800Mbit/s using DDR2 technology’.

The Inphi INSSTUB32866 configurable 25bit 1:1 or 14bit 1:2 register exceeds all JESD82-10 performance specifications for DDR2-400 and DDR2-533 rates and all future performance specifications for DDR2-667, DDR2-800 rates.

The part is available in normal or standard 96-ball LFBGA leaded, lead- free and ‘green’ (lead and halogen-free) packages.

The new registered buffer is designed for nominal 1.8V power supply operation.

It supports DDR2 registered DIMM (RDIMM) module E, F, G, H, J, N and complies with DDR2 SDRAM over/undershoot specification as defined in JESD79-2.

A unique feature of the INSSTUB32866 exhibits the lowest propagation delay in the industry which gives module manufacturers the highest margin in production.

In addition, the INSSTUB32866 meets a much tighter minimum and maximum delay window.

This allows memory vendors to use a single register for all four speed grades reducing costs and reducing the bill of materials.

Up to now a memory module manufacturer would need to use up to three different registers to perform the same function as the INSSTUB32866.

The Inphi INSSTUB32866 is currently shipping in production quantities with pricing starting at $3.63 in quantities of 10,000 units.

Integrated Device Technology has introduced a range of new products for DDR2-667 registered dual inline memory modules.
Integrated Device Technology has introduced a range of new products for DDR2-667 registered dual inline memory modules (R-DIMMs). The new products include a set of phase-locked loop (PLL) clock drivers and register products, as well as the industry’s only DDR2-667MHz register validation board (RVB). IDT offers customers an entire range of DIMM products and test platforms.

Typical applications for R-DIMMs are workstations, servers, storage and telecommunication products, such as routers.

The DDR2-667 RVB was designed by IDT as part of the JEDEC Validation Task Group to ensure that components deliver performance that meets the stringent industry requirements dictated by current JEDEC standards.

The new DDR2 register and PLL products can handle operating frequencies up to 667MHz.

The expanded IDT product offering includes a PLL clock driver used for synchronisation of input clock signals from the system motherboard to all SDRAMs on the DIMM.

The device requires no external components and is optimised for very low phase error, dynamic phase offset, static phase offset, skew and jitter, while maintaining frequency and duty cycle over the operating voltage and temperature range.

The new register drives the address signals and supports 1:1 (25bit) and 1:2 (14bit) configurations, allowing designers to work with a single device for multiple DIMM configurations.

The register optimises the DDR2 DIMM load by delivering proprietary output edge-control circuitry that offers minimal switching noise in un-terminated lines for exceptional signal integrity and unmatched performance.

The device also supports low-power standby operation, making it ideal for use in systems with strict low-power-consumption requirements.

The devices are spread-spectrum tolerant, enabling reduced electromagnetic interference for higher reliability in mission-critical networking applications.

IDT is a leading provider of clock management and logic solutions, and has leveraged its core competencies to develop a full array of products for the registered DIMM market.

In addition to the new DDR2-667 products, IDT designed the DDR2-400/533 RVB for the industry and was first to introduce a complete chip set of JEDEC-compliant DDR2-400/533 registers and PLL for registered DIMMs.

The devices target registered DDR2 DIMMs that address the memory needs of growing market areas, such as servers, workstations and communication devices.

The new IDT-developed DDR2-667 register validation platform enables the analysis of the pre- and post-register address bus of the registered DIMMs to ensure optimum performance.

The RVB also allows users to observe simultaneous switching behaviour of the register on a DIMM by way of a quick, easy and accurate test that simulates real-life specific or worst-case address scenarios, enabling the customer to perform robust testing and analysis.

In addition to register testing, the RVB has the ability to control additional factors in the test environment, including DIMM voltage, reference voltages, clock speeds and timing relationships between the clocks and address and control signals.

Alternative methods of register testing include actual DIMM testers, bench tests and testing houses.

However, using these approaches makes it difficult for customers to evaluate registers on a standard platform.

The IDT DDR2 RVB enables an easy and accurate testing environment that is very much like the final application.