PLL stops line cards getting the jitters
Categories: Standard Logic DevicesThe ACS8942A is a jitter attenuating and multiplying phase-locked loop for generating ultra-low-jitter output clocks for Sonet and SDH network equipment.
Sampling now from Semtech, the ACS8942A is a jitter attenuating and multiplying (JAM) phase-locked loop (PLL) for generating ultra-low-jitter output clocks for Sonet and SDH network equipment. The ACS8942A is the latest addition to Semtech’s synchronous equipment timing source (SETS) product family. The IC features jitter generation as low as 0.10ps RMS (G.813, STM-16, 1 to 20MHz band) and 0.93ps RMS (GR-253, OC-48, 12kHz to 20MHz band), well below the jitter requirements of ITU-T and Telcordia specifications for up to OC-48/STM-16 systems.
The device dejitters the output of a line card protection device or line card clock synthesiser, providing a clock-cleaning solution for DSL access multiplexers and metropolitan or edge networking equipment with very tight jitter budgets.
With a tiny 5 x 5mm QFN 32-pin package, the device can be used to attenuate jitter in the network element at the point of use.
The ACS8942A features a unique integrated voltage controlled oscillator, which saves cost and board space; it also eliminates long-term centre frequency drift and the potential for mechanical failure of an external oscillator.
‘The ACS8942A offers a significant advantage to the designer who is finding that jitter is impacting a high-speed design’, stated Stewart Kelly, Director of the Advanced Communications Products Division at Semtech.
‘With this device in our successful SETS product portfolio, Semtech has become the first one-stop shop to fulfill all Sonet/SDH network element, standards-compliant clocking requirements’.
The device nominally inputs a 155.52MHz reference clock via a single, differential LVPECL input and can be configured to provide either 622.08 or 77.76MHz on a single, differential CML output.
The IC features an external feedback-operating mode that allows it to input other common Sonet/SDH spot frequencies (19.44, 38.88, 77.76MHz), and allows the final output signal from any external buffers and dividers to be in exact phase alignment with the clock input.
Engineering samples of the ACS8942A are available now from Semtech’s authorised network of sales representatives and distributors.