HP Unveils New Interface For Nano-Electronic Circuits
Categories: Electronic CircuitsHow do you design nano-sized circuits and guarantee “nearly perfect yields” in the process?
According to HP coding theory will be the key to building a “defect tolerant interface” for its cross-bar architecture in future processors.
Coding theory is most strongly associated with solving math, cryptography and telecom problems.
“We have invented a completely new way of designing an electronic interconnect for nano-scale circuits using coding theory,” said Stan Williams, HP Senior Fellow and director, Quantum Science Research at HP Labs. “By using a cross-bar architecture and adding 50 percent more wires as an ‘insurance policy,’ we believe it will be possible to fabricate nano-electronic circuits with nearly perfect yields even though the probability of broken components will be high.”