VLSI Technology has committed itself to offering copper interconnect technology with its next-generation VSC11 0.15 micro m process technology. It is due to come on-line in 1999 with the maturity of the copper processing equipment.

VLSI’s strategy is to offer copper at the upper metal layers of interconnect in an asic block, levels 4 and 5, and continue to use aluminium for the lower levels. Copper is proposed for the connections between blocks providing a high-speed `superhighway’.

Dipu Pramanik, director of process technology for VLSI, said: “Our studies have shown that using copper at the lowest levels of the block provides only a 3 to 10% improvement.”

Aluminium is also likely to be used in the packaging interconnect because bonding copper to packaging substrates is still an open issue.

The VLSI technology roadmap predicts copper being used in all metal layers at 0.13 micro m geometries.

Asked about the importance of Novellus’s announcement of the Damascus copper deposition production toolset, VLSI agrees it is significant, but says there are still many issues to be resolved in incorporating copper at all levels of a device - primarily the need for mature processing equipment.